Global Mixed-mode Technology Inc.
G570
Logic Input and Outputs
escent current to 2µA to conserve battery power.
The serial interface consists of DATA, CLOCK, and
LATCH leads. The data is clocked in on the positive
leading edge of the clock (see Figure 2). The 9-bit (D0
through D8) serial data word is loaded during the positive
edge of the latch signal. The latch signal should occur
before the next positive leading edge of the block.
The G570 serial interface is designed to be compatible
with serial-interface PCMCIA controllers and current
PCMCIA and Japan Electronic Industry Development
Association (JEIDA) standards.
An overcurrent output ( OC ) is provided to indicate an
overcurrent condition in any of the VCC or VPP outputs as
previously discussed.
The shutdown bit of the data word places all VCC and VPP
outputs in a high-impedance state and reduces chip qui-
G570
Card A
S7
VPP1
S8
VPP2
S9
S1
S2
VCC
S3
cs
VCC
3.3V
See Note A
cs
3.3V
3.3V
Card B
S4
cs
VCC
VCC
S5
S6
5V
S10
5V
VPP1
VPP2
S11
S12
5V
cs
12V
12V
See Note A
Internal
Current Monitor
RESET
Supervisor
Controller
CPU
RESET
DATA
CLOCK
LATCH
Thermal
Serial
Interface
}
OC
GND
NOTE:MOSFET switches S9 and S12 have a back-gate diode from the source to the drain.
Unused switch inputs should never be grounded.
Figure 3 Internal Switching Matrix
Ver 1.0
Nov 09, 2000
10
TEL: 886-3-5788833
http://www.gmt.com.tw
GMT [ GLOBAL MIXED-MODE TECHNOLOGY INC ]
