Global Mixed-mode Technology Inc.
G1430
SHUTDOWN Mode Operations
De-popping circuitry of G1430 is shown on Figure 4.
The PNP transistor limits the voltage drop across
G1430 implements the shutdown mode operations
to reduce supply current, IDD, to the absolute mini-
mum level during nonuse periods for battery-power
conservation. When the shutdown pin (pin 2) is
pulled high, all linear amplifiers will be deactivated
to mute the amplifier outputs. And G1430 enters an
extra low current consumption state, IDD is smaller
than 5µA. Shutdown pin should never be left un-
connected, this floating condition will cause the am-
plifier operations unpredictable.
the 50k by slewing the internal node slowly when
Ω
power is applied. At start-up, the voltage at
BYPASS capacitor is 0. The PNP is ON to pull the
mid-point of the bias circuit down. So the capacitor
sees a lower effective voltage, and thus the charg-
ing is slower. This appears as a linear ramp (while
the PNP transistor is conducting), followed by the
expected exponential ramp of an R-C circuit.
Optimizing DEPOP Operation
Circuitry has been implemented in G1430 to mini-
mize the amount of popping heard at power-up and
when coming out of shutdown mode. Popping oc-
curs whenever a voltage step is applied to the
speaker and making the differential voltage gener-
ated at the two ends of the speaker. To avoid the
popping heard, the bypass capacitor should be
chosen promptly, 1/(CBx100kΩ) ≦ 1/(CI*(RI+RF)).
Where 100kΩ is the output impedance of the
mid-rail generator, CB is the mid-rail bypass capaci-
tor, CI is the input coupling capacitor, RI is the input
impedance, RF is the gain setting impedance which
is on the feedback path. CB is the most important
capacitor. Besides it is used to reduce the popping,
CB can also determine the rate at which the amplifier
starts up during startup or recovery from shutdown
mode.
VDD
100 kΩ
50 kΩ
Bypass
100 kΩ
Figure 4
TEL: 886-3-5788833
http://www.gmt.com.tw
Ver: 1.0
Jan 15, 2004
25
GMT [ GLOBAL MIXED-MODE TECHNOLOGY INC ]
