Table 1-1: Pin List and Description
Pin Number
1
Name
LF-
Timing
Analog
Type
Input
Description
Loop filter component connection. Connect to pin 56 (LF+) as
shown in
Ground
connection for phase-locked loop. Connect to
GND.
2
PLL_GND
Analog
Input
Power
3
PLL_VDD
Analog
Input
Power
Power supply connection for phase-locked loop. Connect to +1.8V
DC.
Power supply connection for digital input buffers.
When DDI/DDI are AC coupled, this pin should be left unconnected.
When DDI/DDI are DC coupled, this pin should be connected to
+3.3V as shown in
See
for more details.
4
BUFF_VDD
Analog
Input
Power
5, 6
7
DDI, DDI
BUFF_GND
Analog
Analog
Input
Input
Power
Serial digital differential input pair.
Ground
connection for serial digital input buffer. Connect to
GND.
8
9, 11
10
TERM
NC
VBG
Analog
–
Analog
Input
–
Input
Termination for serial digital input. AC couple to BUFF_GND
No connect.
Bandgap filter capacitor. Connect to
GND
as shown in
CONTROL SIGNAL INPUT
Signal Levels are LVCMOS / LVTTL compatible.
Used to enable or disable the I/O processing features.
When set HIGH, the following I/O processing features of the device
are enabled:
• Illegal Code Remapping
• EDH CRC Error Correction
• Ancillary Data Checksum Error Correction
• TRS Error Correction
• EDH Flag Detection
To enable a subset of these features, keep the IOPROC_EN pin
HIGH and disable the individual feature(s) in the IOPROC_DISABLE
register accessible via the host interface.
When set LOW, the device will enter low-latency mode.
NOTE: When the internal FIFO is configured for Video mode or
Ancillary Data Extraction mode, the IOPROC_EN pin must be set
HIGH (see
12
IOPROC_EN
Non
Synchronous
Input
13
JTAG/HOST
Non
Synchronous
Input
CONTROL SIGNAL INPUT
Signal levels are LVCMOS / LVTTL compatible.
Used to select JTAG Test Mode or Host Interface Mode.
When set HIGH, CS_TMS, SCLK_TCK, SDOUT_TDO, and SDIN_TDI are
configured for JTAG boundary scan testing.
When set LOW, CS_TMS, SCLK_TCK, SDOUT_TDO, and SDIN_TDI are
configured as
GSPI
pins for normal host interface operation.
GS9090B GenLINX® III 270Mb/s Deserializer for SDI
Data Sheet
40749 - 5
May 2010
6 of 72
GENNUM [ GENNUM CORPORATION ]
