GS1535A / GS9065A Data Sheet
1.3 GS1535A / GS9065A Pin Descriptions
Table 1-1: GS1535A / GS9065A Pin Descriptions
Pin Number
1, 3
2
4, 8, 12,16, 32,
37, 43, 49, 64
5, 7
6
9, 11
10
13, 15
14
17, 18
Name
DDI0, DDI0
DDI0_VTT
GND
DDI1,DDI1
DDI1_VTT
DDI2, DDI2
DDI2_VTT
DDI3, DDI3
DDI3_VTT
DDI_SEL[1:0]
Type
Input
Passive
Passive
Input
Passive
Input
Passive
Input
Passive
Logic Input
Description
Serial digital differential input 0.
Center tap of two 50Ω on-chip termination resistors between DDI0 and DDI0.
Recommended connect to GND.
Serial digital differential input 1.
Center tap of two 50Ω on-chip termination resistors between DDI1 and DDI1.
Serial digital differential input 2.
Center tap of two 50Ω on-chip termination resistors between DDI2 and DDI2.
Serial digital differential input 3.
Center tap of two 50Ω on-chip termination resistors between DDI3 and DDI3.
Serial digital input select.
DDI_SEL1
0
0
1
1
DDI_SEL0
0
1
0
1
INPUT SELECTED
DDI0
DDI1
DDI2
DDI3
19
BYPASS
Logic Input
Bypass the reclocker stage.
When BYPASS is HIGH, it overwrites the AUTOBYPASS setting.
20
AUTOBYPASS
Logic Input
Automatically bypasses the reclocker stage when the PLL is not locked
This pin is ignored when BYPASS is HIGH.
21
AUTO/MAN
Logic Input
Auto/Manual select.
When set HIGH, the standard is automatically detected from the input data rate.
When set LOW, the user must program the input standard using the SS[2:0]
pins.
22
VCC_VCO
Power
Most positive power supply connection for the internal VCO section.
Connect to 3.3V.
23
VEE_VCO
Power
Most negative power supply connection for the internal VCO section.
Connect to GND.
31497 - 3
November 2005
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