3. DETAILED DESCRIPTION
3.3 CABLE LENGTH INDICATION & CARRIER
DETECT/MUTE
The GS9064 is a high speed bipolar IC designed to
equalize SD serial digital signals. The device can typically
equalize 350 meters of Belden 1694A cable at 270Mb/s.
Powered from a single +3.3V or -3.3V power supply, the
device consumes approximately 240mW of power.
The GS9064 incorporates an analog cable length indicator
(CLI) output and a programmable threshold output mute
(MCLADJ). In addition, a multi-function CD/MUTE pin allows
control of the GS9064 MUTE functionality for SD inputs.
3.1 SERIAL DIGITAL INPUT
3.3.1 Cable Length Indicator
The SD serial digital input signal may be connected to the
input pins (SDI/SDI) in either a differential or single ended
configuration. AC coupling of the inputs is recommended,
as the SDI and SDI inputs are internally biased at
approximately +1.8 volts.
The voltage output of the CLI pin is a representation of the
amount of cable present at the inputs of the device. Figure
8 shows the CLI voltage versus cable length (signal
strength). At 270Mb/s with no cable length and 800mV input
signal levels, the CLI output voltage is approximately 2.5V.
As the cable length is increased, the CLI voltage
decreases, thereby providing an approximate correlation
between the CLI voltage and cable length
3.2 AUTOMATIC CABLE EQUALIZATION
The input signal passes through a variable gain equalizing
stage whose frequency response closely matches the
inverse of the cable loss characteristic. In addition, the vari-
ation of the frequency response with control voltage imitates
the variation of the inverse cable loss characteristic with
cable length.
3.3.2 Programmable Mute Threshold
A voltage programmable mute threshold (MCLADJ) is
included to allow muting of the GS9064 output when a
selected cable length is reached. This feature allows the
device to distinguish between low amplitude SDI signals
and noise at its input.
The edge energy of the equalized signal is monitored by a
detector circuit which produces an error signal
corresponding to the difference between the desired edge
energy and the actual edge energy. This error signal is
integrated by both an internal and an external AGC filter
capacitor providing a steady control voltage for the gain
stage. As the frequency response of the gain stage is
automatically varied by the application of negative
feedback, the edge energy of the equalized signal is kept
at a constant level which is representative of the original
edge energy at the transmitter.
Figure 10 shows the relationship between the voltage
applied to the MCLADJ pin and the input cable length
accepted by the GS9064. For consistent accurate results
this may need to be calibrated for each device. The
MCLADJ pin may be left unconnected for applications
where output muting is not required.
This feature has been designed for use in applications such
as routers where signal crosstalk and circuit noise cause
the equalizer to output erroneous data when no input signal
is actually present. The use of a Carrier Detect function with
a fixed internal reference does not solve this problem since
the signal to noise ratio on the circuit board could be
significantly less than the default signal detection level set
by the on-chip reference.
The equalized signal is also DC restored, effectively restor-
ing the logic threshold of the equalized signal to its correct
level independent of shifts due to AC coupling. The digital
output signals have a nominal voltage of 750mVpp differen-
tial, or 375mVpp single ended when terminated with 50Ω as
shown below in Figure 13.
NOTE: MCLADJ and CLI are only recommended for data
rates up to 360 Mb/s.
+187.5mV
3.3.3 Carrier Detect/Mute
V
= 2.925V
typical
CM
Applying a HIGH INPUT to the CD/Mute pin forces the
GS9064 outputs to a muted condition. See the DC Electrical
Characteristics table for voltage levels. In this condition the
outputs are latched to the last logic level present at the
output to avoid signal crosstalk.
-187.5mV
SDO
SDO
+187.5mV
Applying a LOW INPUT to the CD/Mute pin will force the
GS9064 outputs to remain active regardless of input cable
length or the voltage applied to the MCLADJ pin. See the DC
Electrical Characteristics table for voltage levels.
50
50
V
= 2.925V
typical
CM
-187.5mV
Figure 13 Typical Output Voltage Levels
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