SSI
V
CC
+5V
+
DV
CC
+5V
+
V
CC
0.1µ
GND
DGND
ECL
DATA
INPUT
V
CC
0.1µ
INPUT
75
47p
5
6
7
DDI
DDI
VCC2
390
4
VCC1
VEE1
SWF
0.1µ
V
CC
100
3.3k
100
10µ
+
0.1µ
10µ
10µ
V
CC
0.1µ
DGND
4
VSS
SWF
DGND
100
INPUT SELECTION
DGND
SYNC WARNING FLAG
HSYNC OUTPUT
PARALLEL DATA BIT 9
PARALLEL DATA BIT 8
25
24
23
22
21
20
100
100
100
100
100
100
100
DV
CC
PARALLEL DATA BIT 7
PARALLEL DATA BIT 6
PARALLEL DATA BIT 5
PARALLEL DATA BIT 4
PARALLEL DATA BIT 3
PARALLEL DATA BIT 2
PARALLEL DATA BIT 1
PARALLEL DATA BIT 0
PARALLEL CLOCK OUT
SYNC CORRECTION ENABLE
0.1µ
3
VSS
2
HSYNC
1
PD9
28 27 26
PD8
PDO
VSS
3
AGC
2
A/D
1
SSI
28 27 26
VEE2
VCC4
390
25
24
23
22
100
100
100
100
390
390
5
6
7
8
9
10
11
SDI
SDI
SCI
SCI
SS1
SS0
SDO
SDO
SCO
PD7
PD6
(4)
PD5
PD4
PD3
PD2
PCLK
GS9005A
8 SDI
9 SDI
10 ƒ/2
LOOP
SCO
GS9000B
or GS9000S
V
SS1 21
CC
20
SS0
EYEOUT
RVCO0
RVCO1
RVCO2
RVCO3
VCC3
VDD
VDD
11
VEE3
75
5.6p
(1)
12 13 14 15 16 17 18
V
CC
DV
CC
12 13 14 15 16
SCE
47p
17
22n
113
(2)
VDD
SST
SWC
CD
19
PD1 19
18
910
0.1µF
0.1µ
DGND
100
100
DGND
10n
1.2k
V
CC
1.2k
DV
CC
0.1µ
(3)
50k
V
CC
68k
22n
STAR
ROUTED
+
+
120
DGND
GS9010A
6.8µ
6.8µ
1
2
3
4
3.3n
5
(2)
P/N
OUT
IN-
COMP
LF
ƒ/2
VCC
SWF
STDT
16
0.1µ
6
V
CC
7
8
15
VCC
14
CD
13
HSYNC
12
GND
11
OSC
10
DLY
9
FVCAP
V
CC
100k
82n
0.68µ
(2)
STANDARD TRUTH TABLE
ƒ/2
0
0
P/N
0
1
0
1
STANDARD
4:2:2 - 270
4:2:2 - 360
4ƒsc - NTSC
4ƒsc - PAL
0.1µ
SWF
V
CC
180n
1
1
All resistors in ohms, all capacitors in microfarads, all inductors in henries unless otherwise stated.
(1) Typical value for input return loss matching
(2) To reduce board space, the two anti-series 6.8
µF
capacitors (connected across pins 2 and 3 of the GS9010A)
may be replaced with a 1.0
µF
non-polarized capacitor provided that:
(a) the 0.68
µF
capacitor connected to the OSC pin (11) of the GS9010A is replaced with a 0.33
µF
capacitor and
(b) the GS9005A /15A Loop Filter Capacitor is 10 nF.
(3) Remove this potentiometer if P/N function is not required, and ground pin 16 of the GS9010A.
(4) The GS9000B will operate to a maximum frequency of 370 Mbps.
The GS9000S will operate to a maximum frequency of 300 Mbps.
DOCUMENT
IDENTIFICATION
PRODUCT PROPOSAL
This data has been compiled for market investigation purposes
only, and does not constitute an offer for sale.
ADVANCE INFORMATION NOTE
This product is in development phase and specifications are
subject to change without notice. Gennum reserves the right to
remove the product at any time. Listing the product does not
constitute an offer for sale.
PRELIMINARY
The product is in a preproduction phase and specifications are
subject to change without notice.
DATA SHEET
The product is in production. Gennum reserves the right to
make changes at any time to improve reliability, function or
design, in order to provide the best product possible.
Fig. 3 Typical Application Circuit
REVISION NOTES
Figures 1 and 3 updated
CAUTION
ELECTROSTATIC
SENSITIVE DEVICES
DO NOT OPEN PACKAGES OR HANDLE
EXCEPT AT A STATIC-FREE WORKSTATION
Gennum Corporation assumes no responsibility for the use of any circuits described herein and makes no representations that they are free from patent infringement.
© Copyright January 1994 Gennum Corporation. All rights reserved. Printed in Canada.
521 - 01 - 05
6
GENNUM [ GENNUM CORPORATION ]
