ANALOG
DIGITAL
10µ
+
SSI
-5V
0.1µ
0.1µ
-5V
0.1µ
-5V
390
-5V
4
3
2
1 28 27 26
390
100
100
ECL
DATA
25
24
23
22
21
DATA
DATA
INPUTS
SDO
5
6
DDI
SDO
SCO
SCO
SS1
DDI
VCC2
SDI
CLOCK
CLOCK
0.1µ
100
100
390
7
8
9
GS9005A
-5V
INPUT
75
47p
SDI
20
19
390
SS0
CD
10
11
ƒ/2
47p
VEE3
75
CARRIER
DETECT
OUTPUT
10k
12 13 14 15 16 17 18
113
0.1µ
22n
5.6p
910
-5V
10n
÷2
÷1
See Figure 18
STAR
ROUTED
LOOP
VOLTAGE
-5V
-5V
-5V
All resistors in ohms, all capacitors in microfarads, all inductors in henries unless otherwise stated.
Fig. 17 GS9005A Typical Test Circuit Using -5V Supply
VCO Frequency Setting Resistors
The selection is dependent upon the level of the STANDARD
SELECT BIT, SS1 (pin 21). When SS1 is LOW, RVCO0 and
RVCO1 (pins 13 and 14) are used for the higher data rates.
WhenSS1isHIGH, theVCOfrequencyisnowtwicethebitrate
and its frequency is set by RVCO2 and RVCO3 (pins 15 and
17).
There are two modes of VCO operation available in the
GS9005A. When the ƒ/2 ENABLE (pin 10) is LOW, any of the
fourVCO frequency setting resistors, RVCO0 through RVCO3
(pins13,14,15and17)maybeusedforanydatarate from 100
Mb/s to over 400 Mb/s. For example, for 143Mb/sdata
rate, the value of the total RVCO resistance is approximately
6k8 and for 270 Mb/s operation, the value is approximately
3k5. The5kpotentiometerswillthentunethedesireddatarate
near their mid-points.
For 143 Mb/s and 270 Mb/s operation, (the VCO is at 286 MHz
and 270 MHz respectively) the total resistance required is
approximately the same for both data rates. This also applies
for 177 Mb/s and 360 Mb/s operation (the VCO is tuned to
354 MHz and 360 MHz respectively). This means that one
potentiometer may be used for each frequency pair with only
a small variation of the fixed resistor value. This halves the
number of adjustments required.
Jitter performance at the lower data rates (143, 177 Mb/s) is
improvedbyoperatingtheVCOattwicethenormalfrequency.
This is accomplished by enabling the ƒ/2 function which
activates an additional divide by two block in the PLL section
of the GS9005A.
When the ƒ/2 ENABLE is HIGH two of the RVCO pins are
assigned to data rates below 200 Mb/s and two are assigned
to data rates over 200 Mb/s.
10
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