GS9002A PIN DESCRIPTIONS (Continued)
NOT RECOMMENDED FOR NEW DESIGNS
PIN NO
37
38,39
SYMBOL
V
EE
SDO/SDO
TYPE
DESCRIPTION
Power Supply: Most negative power supply connection.
O
Serial Data Outputs (true and inverse). Pseudo-ECL differential outputs representing the serialized
data. These outputs require 390Ω pull down resistors.
40
41
42,43
V
CC2b
V
CC2a
SCK/SCK
O
Power Supply: Most positive power supply connection for the Serial Data ECL output buffers.
Power Supply: Most positive power supply connection for the Serial Clock ECL output buffers.
Serial Clock Outputs (inverse and true). Pseudo-ECL differential outputs of the Serial Clock (10x
Parallel Clock). These outputs require 390Ω pull-down resistors.
44
V
EE
Power Supply: Most negative power supply connection.
INPUT / OUTPUT CIRCUITS
V
CC
5k
V
CC
1k
1k
INPUT
SYNC DET
V
R1
V
EE
V
EE
Fig. 2 Pin No. 3
Sync Detect
Fig. 3 Pins No. 6, 7 - 16, 17,26
Sync Disable, Parallel Data, Parallel Clock,
Scrambler/Serializer Select
V
CC
V
CC
V
CC
1k
1k
10k
PCK OUT
LOCK
DETECT
V
EE
V
EE
Fig. 4 Pin No. 19
Parallel Clock Out
24149 - 1
Fig. 5 Pin No. 20
Lock Detect
6 of 11