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GS4915-INE3 参数 Datasheet PDF下载

GS4915-INE3图片预览
型号: GS4915-INE3
PDF下载: 下载PDF文件 查看货源
内容描述: ClockCleaner ™ [ClockCleaner⑩]
分类和应用:
文件页数/大小: 26 页 / 650 K
品牌: GENNUM [ GENNUM CORPORATION ]
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GS4915 Data Sheet  
Table 1-1: Pin Descriptions (Continued)  
Pin  
Name  
Timing  
Type  
Description  
Number  
18  
19  
DOUBLE  
Non  
synchronous  
Input  
CONTROL SIGNAL INPUT  
Signal levels are LVCMOS compatible.  
Controls the output frequency of the cleaned clock, for HD input clocks.  
See Section 3.5 for operation.  
SKEW_EN  
Non  
Input  
CONTROL SIGNAL INPUT  
synchronous  
Signal levels are LVCMOS compatible.  
Selects the phase of the output clock with respect to the selected input  
clock.  
See Section 3.6 for operation.  
21  
LOCK  
Non  
Output  
STATUS SIGNAL OUTPUT  
synchronous  
Signal levels are LVCMOS compatible.  
This pin will be HIGH when the output clock is locked to the selected input  
clock.  
It will be LOW otherwise.  
23  
24  
SE_VDD  
Power  
Output  
Positive power supply connection for the single-ended clock driver.  
Determines the output level of CLKOUT_SE. Connect to filtered +1.8V DC  
or +3.3V DC.  
NOTE: If the single-ended clock output is not used, this pin should be tied  
to ground.  
CLKOUT_SE  
CLOCK SIGNAL OUTPUT  
Signal levels are LVCMOS compatible.  
Single-ended video clock output signal.  
See Section 3.7.2 for operation.  
25  
27  
D_VDD  
Power  
Power  
Output  
Positive power supply connection for the single-ended output clock buffer.  
Connect to filtered +1.8V DC.  
NOTE: If the single-ended clock output is not used, this pin should be tied  
to ground.  
DIFF_OUT_VDD  
Positive power supply connection for the LVDS clock outputs. Connect to  
filtered +1.8V DC.  
NOTE: If the LVDS clock outputs are not used, this pin should be tied to  
ground.  
29, 28  
CLKOUT,  
CLKOUT  
CLOCK SIGNAL OUTPUT  
Differential video clock output signal.  
This is the lowest jitter output of the device.  
See Section 3.7.1 for operation.  
32  
DIV_VDD  
Power  
Input  
Positive power supply connection for the divider block. Connect to filtered  
+1.8V DC.  
33,34  
VCO, VCO  
Analog  
Differential input for the external VCO reference signal. When using the  
recommended VCO, leave VCO unconnected.  
See Section 3.3.4 for operation.  
35  
VCO_GND  
Power  
Ground reference for the external voltage controlled oscillator. Connect to  
pins 2, 4, 6, and 8 of the GO1555.  
39145 - 3 November 2007  
6 of 26  
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