1.3 Pin Descriptions
Table 1-1: Pin Descriptions
Pin
Name
Timing
Type
Description
Number
1
2
3
4
5
CP_VDD
PDBUFF_GND
PD_VDD
–
–
–
–
Power
Power
Power
Power
Input
Power supply connection for the charge pump. Connect to +3.3V DC
analog.
Ground connection for the phase detector and serial digital input
buffers. Connect to analog GND.
Power supply connection for the phase detector. Connect to +1.8V DC
analog.
BUFF_VDD
CD1
Power supply connection for the serial digital input buffers. Connect
to +1.8V DC analog.
Non
STATUS SIGNAL INPUT
Synchronous
Signal levels are LVCMOS/LVTTL compatible.
Used to indicate the presence of a serial digital input signal. Normally
generated by a Gennum automatic cable equalizer.
When LOW, the serial digital input signal received at the DDI1 and
DDI1 pins is considered valid.
When HIGH, the associated serial digital input signal is considered to
be invalid. In this case, the LOCKED signal is set LOW and all parallel
outputs are muted.
6, 8
7
DDI1, DDI1
TERM1
Analog
Analog
Input
Input
Differential input pair for serial digital input 1.
Termination for serial digital input 1. AC couple to EQ_GND.
9
DVB_ASI
Non
Synchronous
Input /
Output
CONTROL SIGNAL INPUT / STATUS SIGNAL OUTPUT
Signal levels are LVCMOS/LVTTL compatible.
This pin will be an input set by the application layer in slave mode.
This pin and its function are not supported in Master mode.
Slave Mode (MASTER/SLAVE = LOW)
When set HIGH in conjunction with SD/HD = HIGH and SMPTE_BYPASS
= LOW, the device will be configured to operate in DVB-ASI mode.
When set LOW, the device will not support the decoding or word
alignment of received DVB-ASI data.
10
IP_SEL
Non
Input
CONTROL SIGNAL INPUT
Synchronous
Signal levels are LVCMOS/LVTTL compatible.
Used to select DDI1 / DDI1 or DDI2 / DDI2 as the serial digital input
signal, and CD1 or CD2 as the carrier detect input signal.
When set HIGH, DDI1 / DDI1 is selected as the serial digital input and
CD1 is selected as the carrier detect input signal.
When set LOW, DDI2 / DDI2 serial digital input and CD2 carrier detect
input signal is selected.
GS1560A/GS1561 HD-LINX® II Dual-Rate Deserializer
Data Sheet
8 of 79
27360 - 12
June 2009
GENNUM [ GENNUM CORPORATION ]
