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GS1531-CBE2 参数 Datasheet PDF下载

GS1531-CBE2图片预览
型号: GS1531-CBE2
PDF下载: 下载PDF文件 查看货源
内容描述: GS1531 HD- LINX -TM II多速率串行器 [GS1531 HD-LINX-TM II Multi-Rate Serializer]
分类和应用: 消费电路商用集成电路
文件页数/大小: 49 页 / 853 K
品牌: GENNUM [ GENNUM CORPORATION ]
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GS1531 Data Sheet  
4.5 Data-Through Mode  
The GS1531 may be configured by the application layer to operate as a simple  
parallel-to-serial converter. In this mode, the device presents data to the output  
buffer without performing any scrambling or encoding.  
Data-through mode is enabled only when both the SMPTE_BYPASS and  
DVB_ASI pins are set LOW.  
4.6 Additional Processing Functions  
The GS1531 contains an additional data processing block which is available in  
SMPTE mode only, see SMPTE Mode on page 25.  
4.6.1 Input Data Blank  
The video input data may be 'blanked' by the GS1531. In this mode, all input video  
data except TRS words are set to the appropriate blanking levels by the device.  
Both the horizontal and vertical ancillary data spaces will also be set to blanking  
levels.  
This function is enabled by setting the BLANK pin LOW.  
4.6.2 Automatic Video Standard Detection  
The GS1531 can detect the input video standard by using the timing parameters  
extracted from the received TRS ID words or supplied H, V, and F timing signals,  
see Internal Flywheel on page 25. This information is presented to the host  
interface via the VIDEO_STANDARD register (Table 4-2).  
Total samples per line, active samples per line, total lines per field/frame and active  
lines per field/frame are also calculated and presented to the host interface via the  
RASTER_STRUCTURE registers (Table 4-3). These line and sample count  
registers are updated once per frame at the end of line 12. This is in addition to the  
information contained in the VIDEO_STANDARD register.  
After device reset, the four RASTER_STRUCTURE registers default to zero.  
Table 4-2: Host Interface Description for Video Standard Register  
Register Name  
Bit  
Name  
Description  
R/W  
Default  
VIDEO_STANDARD  
Address: 004h  
15  
Not Used.  
R
R
0
0
14-10  
9
VD_STD[4:0]  
INT_PROG  
Video Data Standard (see Table 4-4).  
Interlace/Progressive: Set LOW if detected video  
standard is PROGRESSIVE and is set HIGH if it is  
INTERLACED.  
8
STD_LOCK  
Standard Lock: Set HIGH when flywheel has  
achieved full synchronization.  
R
0
7-0  
Not Used.  
30573 - 4 July 2005  
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