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GS1524-CTDE3Z 参数 Datasheet PDF下载

GS1524-CTDE3Z图片预览
型号: GS1524-CTDE3Z
PDF下载: 下载PDF文件 查看货源
内容描述: 多速率SDI自适应电缆均衡器 [Multi-Rate SDI Adaptive Cable Equalizer]
分类和应用:
文件页数/大小: 16 页 / 1507 K
品牌: GENNUM [ GENNUM CORPORATION ]
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2.3 AC Electrical Characteristics
Table 2-2: AC Electrical Characteristics
V
CC
= 3.3V ±5%, T
A
= 0°C to 70°C, unless otherwise shown
Parameter
Serial
input data rate
Input Voltage
Swing
Conditions
T
A
=25°C, differential
50Ω load, T
A
=25°C,
differential
Symbol
ΔV
SDI
ΔV
SDO
Min
143
720
Typ
800
Max
1485
950
Units
Mb/s
mV
p-p
mV
p-p
Notes
0m cable
length
Output Voltage
Swing
750
Output
Jitter
for Various
Cable
Lengths and Data Rates
270Mb/s
Belden 1694A: 0-350m
Belden 8281: 0-280m
1.485Gb/s
Belden 1694A: 0-140m
Belden 8281: 0-100m
0.2
UI
2,4
0.25
UI
2,4
Output Rise/Fall time
Mismatch in rise/fall time
Duty cycle distortion
Overshoot
Input Return Loss
Input Resistance
Input
Capacitance
Output Resistance
20% - 80%
single ended
single ended
single ended
15
80
1.64
1
50
220
30
30
10
ps
ps
ps
%
dB
pF
Ω
1
NOTES:
1. Tested on CB1524 board from 5MHz to 2GHz.
2. All parts production tested. In order to guarantee jitter over the full range of specification (V
CC
= 3.3V ±5%, T
A
= 0°C to 70°C, and
720-880mV launch swing from the SDI cable driver) the recommended applications circuit must be used.
3. Based on characterization data using the recommended applications circuit, at V
CC
= 3.3V, T
A
= 25°C, and 800mV launch swing from the SDI
cable driver.
4. Equalizer Pathological test signal is used.
GigaBERT
1400
EXT. CLOCK
CLOCK OUT
DATA
OUT
50/75
8281 or 1694A CABLE
IN
GS1524
TEST BOARD
OUT
OUT
CH. 1
CH. 2
TDS 820
EXT. TRIGGER
EXT.
CLOCK
1.485GHz/270MHz
Figure 2-1: Test
Circuit
GS1524 Multi-Rate SDI Adaptive Cable Equalizer
Data Sheet
14976 - 11
August 2011
6 of 16