PIN DESCRIPTIONS (Continued)
NUMBER
96
SYMBOL
FFRST
TIMING
Synchronous
wrt PCLK_IN
TYPE
Input
DESCRIPTION
Control Signal Input.
FFRST is used to supply synchronous reset
signals to the FIFO. When FFRST is low, the FIFO is reset and all
internal read and write address pointers are set to their starting
locations.
Control Signal Input.
Used to enable or disable extracting data into
the internal FIFO. When WEN is low, extracting data into the internal
FIFO is enabled. When WEN is high, extracting data into the internal
FIFO is disabled.
Control Signal Input.
Used to enable or disable reading data from
the internal FIFO. When REN is low, reading from the internal FIFO is
enabled. When REN is high, reading from the internal FIFO is
disabled.
Control Signal Input.
Used to control copying of ANC data packets
into the internal FIFOs. When ANC/DATA is high, the device
extracts/copies only ANC data packets into the internal FIFO
buffers. When ANC/DATA is low, the device extracts/copies all data
words within the horizontal blanking period regardless of their status
(i.e. ANC data or not) and places these words into the internal FIFO
buffers.
Control Signal Input.
When FM_I/E is high, the device operates in a
mode where the FIFO reset and write enable signals are generated
internally. In this mode, the device limits the data extraction to the
HANC region of the video stream. The extracted ANC data are to be
accessed during the active video period using REN. When FM_I/E
is low, the device operates in another mode where the FIFO reset
and write enable signals are generated externally by the user and
supplied to the device via the FFRST and WEN control signal inputs.
Control Signal Input.
Used to control extraction of ANC data from
the video data stream into the LUMA or CHROMA FIFO. When
ANC_Y/C is high, data is extracted from the luma data stream into
the internal LUMA FIFO. When ANC_Y/C is low, data is extracted
from the chroma data stream into the internal CHROMA FIFO.
Control Signal Input.
Used to control if the ANC Data is extracted or
copied into the internal FIFO buffers. When EX/CP is high, the
device extracts ANC data from the incoming data stream into the
internal FIFO buffers and replaces any extracted words with
appropriate blanking levels. When EX/CP is low, the device makes
a copy of ANC data from the incoming data stream into the internal
FIFO buffers.
Input Data Bus.
DATA_IN [19] is the MSB of the signal (pin 103).
DATA_IN [0] is the LSB of the signal (pin 126). This data is typically
scrambled and not word aligned.
97
WEN
Synchronous
wrt PCLK_IN
Input
GS1500
98
REN
Synchronous
wrt R_CLK
Input
99
ANC/DATA
Non-
synchronous
Input
100
FM_I/E
Non-
synchronous
Input
101
ANC_Y/C
Synchronous
wrt PCLK_IN
Input
102
EX/CP
Non-
synchronous
Input
103,104,105,
106, 107, 108,
111, 112, 113,
114, 117, 118,
119,120, 121,
122, 123, 124,
125, 126
DATA_IN [19:0]
Synchronous
wrt PCLK_IN
Input
DETAILED DESCRIPTION
1. DATA INPUT AND OUTPUTS
2. DESCRAMBLER AND FRAMER
Data enters and exits the device on the rising edge of
PCLK_IN as shown in Figures 1 and 2. This data can be
scrambled or unscrambled and framed or unframed.
Both the descrambler and framer can be enabled or
disabled independently to allow the input to remain
scrambled or unscrambled. If the data is unscrambled, it
can be word aligned (framed) or pass through unaltered.
8
GENNUM CORPORATION
522 - 33 - 00
GENNUM [ GENNUM CORPORATION ]
