GF9331 Data Sheet
3. Detailed Device Description
3.1 Input Data Formats
The GF9331 supports multiple input data formats with multiplexed or separate Y/C
channels. Data is supplied to the GF9331 through the Y_IN[9:0] and the C_IN[9:0]
busses. Table 3-1: Encoding of STD[4:0] for Selecting Input Data Format outlines
the data formats that the GF9331 supports according to the setting of STD[4:0] pins
or host interface bits, STD[4:0].
NOTE: For all progressive video standards the GF9331 must be manually set to
bypass mode (MODE=0, pin or register). See Host Interface for host interface
details.
Table 3-1: Encoding of STD[4:0] for Selecting Input Data Format
STD
STD[4:0]
Description
0
00000
525i (30/1.001) component SMPTE 125M. Multiplexed YCbCr data applied to Y_IN. C_IN should be set
LOW.
NOTE: Input clock is 27MHz.
1
2
00001
00010
Reserved
525i (30/1.001) component 16x9 SMPTE 267M. Multiplexed YCbCr data applied to Y_IN. C_IN should be set
LOW.
NOTE: Input clock is 36MHz.
3
4
00011
00100
Reserved
625i (25Hz) component EBU tech. 3267E. Multiplexed YCbCr data applied to Y_IN. C_IN should be set LOW.
NOTE: Input clock is 27MHz.
5
6
00101
00110
Reserved
625i (25Hz) component 16x9 ITU-R BT.601-5 Part B. Multiplexed YCbCr data applied to Y_IN. C_IN should
be set LOW.
NOTE: Input clock is 36MHz.
7
8
00111
01000
Reserved
525p (60/1.001Hz) SMPTE 293M. YCbCr data stream applied to Y_IN. C_IN should be set LOW. Timing
information is extracted from embedded TRS sequences.
NOTE: Input clock is 54MHz.
9
01001
01010
01011
01100
Reserved
10
11
12
Reserved
Reserved
625p (50Hz) ITU-R BT.1358. YCbCr data stream applied to Y_IN. C_IN should be set LOW. Timing
information is extracted from embedded TRS sequences.
NOTE: Input clock is 54MHz.
Proprietary and Confidential 18303 - 4
June 2004
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