GL852 USB 2.0 MTT HUB Controller
LIST OF FIGURES
F
IGURE
3.1-GL852 64 P
IN
LQFP P
INOUT
D
IAGRAM
...................................................... 9
-
F
IGURE
3.2-GL852 48 P
IN
LQFP P
INOUT
D
IAGRAM
.................................................... 10
-
F
IGURE
3.2-GL852 48 P
IN
QFN P
INOUT
D
IAGRAM
...................................................... 11
-
F
IGURE
4.1 - GL852 B
LOCK
D
IAGRAM
(
MULTIPLE
TT) .................................................. 15
F
IGURE
5.1 - O
PERATING IN
USB 1.1
SCHEME
.................................................................. 17
F
IGURE
5.2 - O
PERATING IN
USB 2.0
SCHEME
.................................................................. 18
F
IGURE
5.3 - RESET# (E
XTERNAL
R
ESET
)
SETTING AND APPLICATION
......................... 19
F
IGURE
5.4 - P
OWER ON SEQUENCE OF
GL852................................................................. 19
F
IGURE
5.5 - T
IMING OF
PGANG/SUSPND
STRAPPING
................................................. 20
F
IGURE
5.6 - GANG M
ODE
S
ETTING
................................................................................ 20
F
IGURE
5.7 - SELF/BUS P
OWER
S
ETTING
....................................................................... 21
F
IGURE
5.8 - LED C
ONNECTION
....................................................................................... 21
F
IGURE
5.9 - S
CHEMATICS
B
ETWEEN
GL852
AND
93C46................................................ 23
F
IGURE
7.1 - GL852 64 P
IN
LQFP P
ACKAGE
................................................................... 28
F
IGURE
7.2 – GL852 48 P
IN
LQFP P
ACKAGE
.................................................................. 29
F
IGURE
7.2 – GL852 48 P
IN
QFN P
ACKAGE
.................................................................... 30
©2000-2007 Genesys Logic Inc. - All rights reserved.
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