GL852 USB 2.0 MTT HUB Controller
Clock and Reset Interface
GL852
64Pin#
20
GL852
48Pin#
14
Pin Name
I/O Type
Description
X1
X2
I
12MHz crystal clock input.
21
15
O
12MHz crystal clock output.
Active low. External reset input, default pull high 10KΩ.
When RESET# = low, whole chip is reset to the initial
state.
RESET#
38
26
I
System Interface
GL852
64 Pin#
GL852
48Pin#
Pin Name
I/O Type
Description
I
(pd)
0: Normal operation.
1: Chip will be put in test mode.
TEST
39
27
Power / Ground
GL852
64 Pin#
GL852
48Pin#
Pin Name
I/O Type
Description
11,18,22,
28,64
AVDD
AGND
DVDD
1,7,12,16,19
2,8,13,20,
P
P
P
3.3V analog power input for analog circuits.
Analog ground input for analog circuits.
3.3V digital power input for digital circuits
1,12,19,
23,29
25,34,38,44,
48
37,47,
52,59
36,46,
51,58,62
DGND
NC
47
-
P
-
Digital ground input for digital circuits.
No connection
2,5~7,10,
13,16,24,
27,30,33
Note: Analog circuits are quite sensitive to power and ground noise. PCB layout must take care the power
routing and the ground plane. For detailed information, please refer to GL852 Design Guideline.
Notation:
Type
O
Output
I
Input
B
Bi-directional
B/I
B/O
P
Bi-directional, default input
Bi-directional, default output
Power / Ground
A
Analog
SO
pu
pd
odpu
Automatic output low when suspend
Internal pull up
Internal pull down
Open drain with internal pull up
©2000-2007 Genesys Logic Inc. - All rights reserved.
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