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GL852-MSGAA 参数 Datasheet PDF下载

GL852-MSGAA图片预览
型号: GL852-MSGAA
PDF下载: 下载PDF文件 查看货源
内容描述: [暂无描述]
分类和应用: 控制器
文件页数/大小: 31 页 / 497 K
品牌: GENESYS [ GENESYS LOGIC ]
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GL852 USB 2.0 MTT HUB Controller  
GREEN2/  
EE_DO  
11 RREF  
12 AVDD  
B
P
23 GREEN4  
24 AMBER4  
O
O
35  
36  
O
O
47 DGND  
48 DVDD  
P
P
AMBER2/  
EE_DI  
3.3 Pin Descriptions  
Table 3.3 - Pin Descriptions  
USB Interface  
GL852  
GL852  
Pin Name  
I/O Type  
Description  
64 Pin#  
48Pin#  
3,4  
DM0,DP0  
DM1,DP1  
DM2,DP2  
DM3,DP3  
DM4,DP4  
3,4  
B
B
B
B
B
USB signals for USPORT  
8,9  
5,6  
USB signals for DSPORT1  
USB signals for DSPORT2  
USB signals for DSPORT3  
USB signals for DSPORT4  
14,15  
25,26  
31,32  
9,10  
17,18  
21,22  
A 680resister must be connected between RREF and  
analog ground (AGND).  
RREF  
17  
11  
B
Note: USB signals must be carefully handled in PCB routing. For detailed information, please refer to  
GL852 Design Guideline.  
HUB Interface  
GL852  
64 Pin#  
GL852  
48Pin#  
Pin Name  
I/O Type  
Description  
Active low. Over current indicator for DSPORT1~4  
OVCUR1# is the only over current flag for GANG  
mode.  
56,54,  
42,40  
I
(pu)  
OVCUR1#~4  
PWREN1#~4  
GREEN1~4  
42,40,30,28  
43,41,31,29  
45,35,32,23  
Active low. Power enable output for DSPORT1~4  
PWREN1# is the only power-enable output for GANG  
mode.  
57,55,  
43,41  
O
1,3,4: O  
2: B  
(pd)  
O
Green LED indicator for DSPORT1~4  
*GREEN[1~2] are also used to access the external EEPROM  
For detailed information, please refer to Chapter 5.  
60,48,  
44,34  
61,49,  
45,35  
Amber LED indicator for DSPORT1~4  
*Amber [1~2] are also used to access the external EEPROM  
AMBER1~4  
PSELF  
46,36,33,24  
37  
(pd)  
0: GL852 is bus-powered.  
1: GL852 is self-powered.  
50  
I
This pin is default put in input mode after power-on  
reset. Individual/gang mode is strapped during this  
period. After the strapping period, this pin will be set to  
output mode, and then output high for normal mode.  
When GL852 is suspended, this pin will output low.  
*For detailed explanation, please see Chapter 5  
PGANG/  
SUSPND  
53  
39  
B
Gang  
Individual  
input:1, output: 0@normal, 1@suspend  
input:0, output: 1@normal, 0@suspend  
©2000-2007 Genesys Logic Inc. - All rights reserved.  
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