GL850G USB 2.0 Low-Power HUB Controller
GL850G internally contains a power on reset circuit. The power on sequence is depicted in the next picture.
To fully control the reset process of GL850G, we suggest the reset time applied in the external reset circuit
should longer than that of the internal reset circuit.
DVDD
Power good voltage, 2.5~2.8V
2.7
s
Internal reset
External reset
Figure 5.3 – Power on sequence of GL850G
5.2.2 PGANG/SUSPND Setting
To save pin count, GL850G uses the same pin to decide individual/gang mode as well as to output the
suspend flag. The individual/gang mode is decided within 20us after power on reset. Then, about 50ms later,
this pin is changed to output mode. GL850G outputs the suspend flag once it is globally suspended. For
individual mode, a pull low resister greater than 100KΩ should be placed. For gang mode, a pull high
resister greater than 100K should be placed. In figure 5.5, we also depict the suspend LED indicator
Ω
schematics. It should be noticed that the polarity of LED must be followed, otherwise the suspend current
will be over spec limitation (2.5mA).
RESET#
50 ms
GANG_CTL
Output mode, Indicating
GL850G Is In normal
mode or suspend mode
Input mode, strapping
to decide individual or
gang mode
Figure 5.4 – Timing of PGANG/SUSPEND strapping
©2000-2007 Genesys Logic Inc. - All rights reserved.
Page 17