GL850G USB 2.0 Low-Power HUB Controller
LIST OF FIGURES
F
F
F
F
F
F
F
F
F
F
F
IGURE 3.1－GL850G 48 PIN LQFP PINOUT
DIAGRAM................................................... 9
IGURE 4.1 – GL850G BLOCK SINGLE TT) ................................................... 13
DIAGRAM (
IGURE 5.1 – OPERATING IN USB 1.1 SCHEME................................................................. 15
IGURE 5.2 – OPERATING IN USB 2.0 SCHEME................................................................. 16
IGURE 5.3 – POWER ON SEQUENCE OF GL850G............................................................. 17
IGURE 5.4 – TIMING OF PGANG/SUSPEND STRAPPING .............................................. 17
IGURE 5.5 – INDIVIDUAL/GANG MODE
S
ETTING .......................................................... 18
ETTING ...................................................................... 18
IGURE 5.7 – LED CONNECTION ...................................................................................... 19
ETWEEN GL850G AND 93C46............................................ 20
IGURE 7.1 – GL850G 48 PIN LQFP PACKAGE............................................................... 24
IGURE 5.6 – SELF/BUS POWER
S
IGURE 5.8 – SCHEMATICS
B
©2000-2007 Genesys Logic Inc. - All rights reserved.
Page 5
GENESYS [ GENESYS LOGIC ]
