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GL850G-HHYXX 参数 Datasheet PDF下载

GL850G-HHYXX图片预览
型号: GL850G-HHYXX
PDF下载: 下载PDF文件 查看货源
内容描述: [USB Bus Controller, CMOS, PDSO28, SSOP 28]
分类和应用: 控制器
文件页数/大小: 29 页 / 384 K
品牌: GENESYS [ GENESYS LOGIC ]
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GL850A USB 2.0 Low-Power HUB Controller  
output mode, and then output high for normal mode.  
When GL850A is suspended, this pin will output low.  
*For detailed explanation, please see Chapter 5  
Gang  
Individual  
input:1, output: 0@normal, 1@suspend  
input:0, output: 1@normal, 0@suspend  
Clock and Reset Interface  
I/O Type  
GL850A  
Pin Name  
Description  
48Pin# 64Pin#  
X1  
X2  
14  
15  
20  
21  
I
12MHz crystal clock input.  
12MHz crystal clock output.  
O
Active low. External reset input, default pull high 10K.  
When RESET# = low, whole chip is reset to the initial  
state.  
RESET#  
28  
38  
I
System Interface  
GL850A  
48Pin# 64 Pin#  
Pin Name  
I/O Type  
Description  
0: Normal operation.  
1: Chip will be put in test mode.  
I
(pd)  
TEST  
29  
39  
Power / Ground  
GL850A  
Pin Name  
I/O Type  
Description  
48Pin# 64 Pin#  
1,7,12, 11,18,22,  
28,64  
AVDD  
AGND  
DVDD  
P
P
P
3.3V analog power input for analog circuits.  
Analog ground input for analog circuits.  
3.3V digital power input for digital circuits  
16,20  
2,8,13, 1,12,19,  
23,29  
17,21  
27,34,  
39,44  
37,47,  
52,59  
26,33,  
38,  
43,47  
36,46,  
51,58,62  
DGND  
NC  
P
-
Digital ground input for digital circuits.  
No connection  
2,5~7,  
10,13,16,  
24,27,30,  
33  
30  
Note: Analog circuits are quite sensitive to power and ground noise. PCB layout must take care the power  
routing and the ground plane. For detailed information, please refer to GL850A Design Guideline.  
Notation:  
Type  
O
Output  
I
Input  
B
Bi-directional  
B/I  
B/O  
P
Bi-directional, default input  
Bi-directional, default output  
Power / Ground  
©2000-2007 Genesys Logic Inc. - All rights reserved.  
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