GL811E USB 2.0 to ATA/ATAPI Bridge Controller
3.2 Pin Descriptions
Table 3.1 - Pin Descriptions
Pin Name
48Pin# 64 Pin# I/O Type
Description
B
(tri)
1
-
1
GPIO7
GPIO7 (**)
3,4
O
GPIO5~6
AP programmable
B
(tri)
5~8
2~5
IODD[8:11]
IDE data bus 8~11 (*****)
56,9
DVCC1~2
DGND1~2
IODD[12:15]
P
P
6,43
7,42
8~11
Digital VCC
55,10
Digital ground
B
(tri)
I
(tri)
O
(tri)
O
(tri)
11~14
IDE data bus 12~15 (*****)
CBLID_
CS1_
12
13
14
15
15
20
-
Cable select input (*****)
Chip select 1 (*****)
DA2/SK
RESET#
IDE address 2 / Serial data clock for EEPROM (*****)
Reset pin (***)
I
22
23
(pu)
RPU
A
16
17,24
18
3.3v output
24,31
25
AVCC0~1
DPF
P
Analog VCC
Full speed DP
High speed DP
B
B
B
26
DPH
19
27
DMF
20
21
Full speed DM
28
29,34
30
DMH
AGND0~1
RREF
X2
B
P
A
B
I
High speed DM
22,27
23
Analog ground
Reference resister connect (****)
Crystal output
25
32
26
33
X1
Crystal input, 12Mhz
I
28
29
-
37
TEST
TEST mode input
(pd)
O
(tri)
O
(tri)
O
(tri)
I
(tri)
O
CS0_
Chip select 0 (*****)
IDE address 0~1 (*****)
IDE address 2 (*****)
IDE interrupt input (*****)
IDE acknowledge (*****)
IDE ready (*****)
30,31
-
38,39
21
DA0~1
DA2
32
44
INTRQ
DMACK_
IORDY
33
45
(tri)
I
(pu)
34
46
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