ICS1722
Master Reset: MRN Pin
VIN pin
R2
The MRN pin is provided to re-program the controller for a new
mode or charging sequence. This pin has an internal pull-up of
about 75kW. A logic low on the MRN pin must be present for more
than 700ms for a reset to occur. As long as the pin is low, the
controller is held in a reset condition. A master reset is required to
clear the charging system test, reset the ten hour timer, change
charge rates or auxiliary modes. Upon power-up, the controller
automatically resets itself.
R1
# of cells
Clock Input: RC Pin
The RC pin is used to set the frequency of the internal clock when
an external 1 MHz clock is not available. An external resistor must
be connected between this pin and VDD. An external capacitor
must be connected between this pin and ground. The frequency of
Figure 7: Resistor divider network
at the VIN pin
the internal clock will be about 1 MHz with a 16kW resistor and a
100pF capacitor. All time durations noted in this document are
based on a 1 MHz clock. Operating the clock at a lower frequency
will proportionally change all time
durations. Operating the clock at a frequency significantly lower
than 1 MHz, without adjusting the charge current accordingly, will
lessen the effectiveness of the fast charge timer and lower the
accuracy of the controller. Operating the clock at a frequency
greater than 1 MHz will also change all time durations and, without
adjusting the charge current accordingly, may cause termination to
occur due to the fast charge timer expiring rather than by the
battery reaching full charge.
Open Circuit Voltage Reference: OPREF Pin
The OPREF pin has an internal 75kW pull-up resistor to VDD.
OPREF requires an external pull-down resistor to establish the
open circuit (no battery) voltage reference. The purpose of this
voltage reference is to detect the removal of the battery from the
charging system. The voltage at this pin is compared to the voltage
at the VIN pin when the current source is turned on. If the voltage
at VIN is greater than the voltage at OPREF, the ICS1722 assumes
the battery has been removed and the ICS1722 enters the polling
detect mode.
The clock may be driven by a 1 MHz external 0 to 5V pulse
provided the duty cycle is between 10% and 60%. The clock input
For proper operation, the voltage at OPREF must be set below the
(divided down) open circuit voltage produced by the current source
and above the maximum normalized battery voltage. The OPREF
pin voltage must not exceed 2.3V or it will prevent the start of fast
charge. If the voltage on OPREF exceeds 4V, the controller will
shutdown and must be reset.
impedance is about 1kW.
Voltage Input: VIN Pin
The battery voltage must be normalized by an external resistor
divider network to one cell. The electrochemical potential of one
cell is about 1.2V. For example, if the battery consists of six cells
in series, the voltage at the VIN pin must be equal to the total
battery voltage divided by six. This can be accomplished with two
resistors, as shown in Figure 7. To determine the correct resistor
values, count the number of cells to be charged in series. Then
choose either R1 or R2 and solve for the other resistor using:
As an example, suppose that a current source has an open circuit
voltage of 12V as shown in Figure 8. The maximum expected
battery voltage of a six-cell pack is determined to be 9.6V. The
voltage at OPREF should be set at a point between 1.6V (9.6V/6
cells=1.6V) and 2V (12V/6=2V). This is accomplished with a pull-
down resistor. Refer to the VIN and OPREF resistor tables in the
Applications Information section. From the VIN table, the divider
resistors are 10kW and 2kW for R1 and R2. From the OPREF
R1 = R2 * (# of cells -1) or R2 =
R1
table, the pull-down resistor is 43kW for R3. If R3 is 43kW, the
voltage at OPREF is 1.82V since the internal pull-up at the OPREF
(# of cells -1)
pin is 75kW.
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GALAXY [ GALAXY POWER, INC. ]
