MBM29LV400TC-70/-90/-12/MBM29LV400BC-70/-90/-12
■ AC CHARACTERISTICS
• Read Only Operations Characteristics
Parameter
Symbols
-70
-90
-12
Description
Test Setup
Unit
(Note) (Note) (Note)
JEDEC Standard
tAVAV
tRC
Read Cycle Time
—
Min.
Max.
70
70
90
90
120
120
ns
ns
CE = VIL
OE = VIL
tAVQV
tACC
Address to Output Delay
tELQV
tGLQV
tEHQZ
tGHQZ
tCE
tOE
tDF
tDF
Chip Enable to Output Delay
Output Enable to Output Delay
Chip Enable to Output High-Z
Output Enable to Output High-Z
OE = VIL Max.
70
30
25
25
90
35
30
30
120
50
ns
ns
ns
ns
—
—
—
Max.
Max.
Max.
30
30
Output Hold Time From
Addresses,
tAXQX
tOH
—
Min.
0
0
0
ns
CE or OE, Whichever Occurs First
—
—
tREADY
RESET Pin Low to Read Mode
—
—
Max.
Max.
20
5
20
5
20
5
µs
tELFL
tELFH
CE or BYTE Switching Low or
High
ns
Note: Test Conditions:
Output Load: 1 TTL gate and 30 pF (MBM29LV400TC/BC-70)
1 TTL gate and 100 pF (MBM29LV400TC/BC-90/-12)
Input rise and fall times: 5 ns
Input pulse levels: 0.0 V to 3.0 V
Timing measurement reference level
Input: 1.5 V
Output:1.5 V
3.3 V
IN3064
or Equivalent
2.7 kΩ
Device
Under
Test
6.2 kΩ
CL
Diodes = IN3064
or Equivalent
Notes: CL = 30 pF including jig capacitance (MBM29LV400TC/BC-70)
CL = 100 pF including jig capacitance (MBM29LV400TC/BC-90/-12)
Figure 4 Test Conditions
31
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