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MB90613A 参数 Datasheet PDF下载

MB90613A图片预览
型号: MB90613A
PDF下载: 下载PDF文件 查看货源
内容描述: 16位微控制器专有 [16-bit Proprietary Microcontroller]
分类和应用: 微控制器
文件页数/大小: 91 页 / 1409 K
品牌: FUJITSU [ FUJITSU ]
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MB90610A Series  
Pin no.  
Circuit  
type  
Pin name  
P91  
Function  
LQFP*1  
QFP*2  
57  
59  
D
General purpose I/O port  
This applies when serial data output is disabled for UART1.  
(CMOS/H)  
SOT1  
P92  
Serial data output pin for UART1  
This applies when serial data output is enabled for UART1.  
58  
60  
61  
D
General purpose I/O port  
This applies when the UART1 clock output is disabled.  
(CMOS/H)  
SCK1  
Clock I/O pin for UART1  
This applies when the UART1 clock output is enabled.  
As the input operates continuously when UART1 is set to  
input operation, output to the pin from other functions must  
be stopped unless done intentionally.  
59  
P93  
D
General purpose I/O port  
This applies in all cases.  
(CMOS/H)  
SIN2  
Serial data input pin for UART2  
As the input operates continuously when UART2 is set to  
input operation, output to the pin from other functions must  
be stopped unless done intentionally.  
60  
61  
62  
63  
P94  
D
General purpose I/O port  
This applies when serial data output is disabled for UART2.  
(CMOS/H)  
SOT2  
P95  
Serial data output pin for UART2  
This applies when serial data output is enabled for UART2.  
D
General purpose I/O port  
This applies when the UART2 clock output is disabled.  
(CMOS/H)  
SCK2  
Clock I/O pin for UART2  
This applies when the UART2 clock output is enabled.  
As the input operates continuously when UART2 is set to  
input operation, output to the pin from other functions must  
be stopped unless done intentionally.  
62  
64  
CS0  
J
Chip select pin for program ROM  
(CMOS)  
63 to 69 65 to 71 PA1 to PA7  
CS1 to CS7  
I
General purpose I/O ports  
This applies for pins with chip select output disabled by the  
chip select control register.  
(CMOS)  
Output pins for the chip select function  
This applies for pins with chip select output enabled by the  
chip select control register.  
70  
72  
P50  
CLK  
I
General purpose I/O port  
This applies when CLK output is enabled.  
(CMOS)  
CLK output pin  
(Continued)  
*1: FPT-100P-M05  
*2: FPT-100P-M06  
9
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