MB90560/565 Series
(4) UART0, UART1, and I/O Expansion Serial Timings
(TA = −40 °C to +85 °C, VCC = 5.0 V ±10%, VSS = AVSS = 0.0 V)
Value
Parameter
Symbol Pin Name
Condition
Unit Remarks
Min.
Max.
Serial clock cycle time
tSCYC
tSLOV
SCK0, SCK1
8 tCP
ns
ns
SCK ↓ → SOT delay
time
SCK0, SCK1
SOT0, SOT1
−80
100
60
80
Internal shift clock
mode, output pin load is
CL = 80 pF + 1 TTL
SCK0, SCK1
SIN0, SIN1
Valid SIN → SCK ↑
tIVSH
tSHIX
tSHSL
tSLSH
tSLOV
tIVSH
tSHIX
ns
ns
ns
ns
ns
ns
ns
SCK ↑ → valid
SIN hold time
SCK0, SCK1
SIN0, SIN1
Serial clock “H” pulse
width
SCK0, SCK1
SCK0, SCK1
4 tCP
4 tCP
Serial clock “L” pulse
width
External shift clock
mode, output pin load is
CL = 80 pF + 1 TTL
SCK ↓ → SOT delay
time
SCK0, SCK1
SOT0, SOT1
150
SCK0, SCK1
SIN0, SIN1
Valid SIN → SCK ↑
60
60
SCK ↑ → valid
SIN hold time
SCK0, SCK1
SIN0, SIN1
Notes : • These are the AC ratings for CLK synchronous mode.
• CL is the load capacitor connected to the pin for testing.
• tCP is the machine cycle period (unit = ns)
65
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