MB90540/540G/545/545G Series
• RST pin is “L”
Oscillation setting time*2
Power-on reset*1
VCC (Power-supply pin)
PONR (power-on reset) signal
RST (external asynchronous reset) signal
RST (internal reset) signal
Oscillation clock signal
KA (internal operation clock A) signal
KB (internal operation clock B) signal
PORT (port output) signal
High-impedance
*1 : Power-on reset time : Period of “clock frequency × 217” (Clock frequency of 16 MHz : 8.19 ms)
*2 : Oscillation setting time : Period of “clock frequency × 218” (Clock frequency of 16 MHz : 16.38 ms)
(13) Initialization
Inthedevice, thereareinternalregisterswhichareinitializedonlybyapower-onreset. Toinitializetheseregisters,
please turn on the power again.
(14) Directions of “DIV A, Ri” and “DIVW A, RWi” instructions
In the Signed multiplication and division instructions (“DIV A, Ri” and “DIVW A, RWi”) , the value of the corre-
sponding bank register (DTB, ADB, USB, SSB) is set in “00H”.
If the values of the corresponding bank registers (DTB, ADB, USB, SSB) are set to other than “00H”, the remainder
by the execution result of the instruction is not stored in the register of the instruction operand.
(15) Using REALOS
The use of EI2OS is not possible with the REALOS real time operating system.
(16) Caution on Operations during PLL Clock Mode
If the PLL clock mode is selected, the microcontroller attempt to be working with the self-oscillating circuit even
when there is no external oscillator or external clock input is stopped. Performance of this operation, however,
cannot be guaranteed.
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