MB89160/160A Series
Digital output
AVR
256
1111 1111
1111 1110
Actual conversion value
1 LSB =
•
•
•
Theoretical conversion value
VNT − (1 LSB × N + VOT)
Linearity error =
1 LSB
•
•
•
V(N+1)T − VNT
− 1
(1 LSB × N + VOT)
Defferential linearity error =
1 LSB
•
•
•
•
VNT − (1 LSB × N + 1 LSB)
Total error =
1 LSB
Linearity error
•
0000 0010
0000 0001
0000 0000
VOT
VNT V(N + 1)T
VFST
Analog input
(2) Precautions
• Input impedance of analog input pins
The A/D converter contains a sample hold circuit as illustrated below to fetch analog input voltage into the
sample hold capacitor for eight instruction cycles after activating A/D conversion.
For this reason, if the output impedance of the external circuit for the analog input is high, analog input voltage
might not stabilize within the analog input sampling period. Therefore, it is recommended to keep the output
impedance of the external circuit low (below 10 kΩ).
Note that if the impedance cannot be kept low, it is recommended to connect an external capacitor of about
0.1 µF for the analog input pin.
Analog Input Equivalent Circuit
Sample hold circuit
.
C = 33 pF
.
Analog input pin
Comparator
If the analog input
impedance is higher
than 10 kΩ, it is
recommended to
connect an external
capacitor of approx.
0.1 µF.
.
R = 6 kΩ
.
Close for 8 instruction cycles after
activating A/D conversion.
Analog channel selector
• Error
The smaller the |AVR – AVSS|, the greater the error would become relatively.
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