MB91360G Series
(Continued)
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External bus interface unit with a wide range of functions
Divides the external memory space into a maximum of eight areas. Chip select signal setting, data bus width
selection (8, 16, 32-bit) , and area size can be specified for each area.
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Address bus up to 32 bit wide
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Programmable auto-wait function
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Internal instruction cache
The MB91360G series contains up to 4-Kbyte instruction cache to improve the execution speed of external
programs.
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Two-way set associative caching
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DMAC
Direct memory access (DMA) can be used to perform various types of data transfer without going via the CPU.
This improves system performance.
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Eight channels (including up to 3 external channels)
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Three transfer modes supported : single/block, burst, continuous transfer
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Power consumption control mechanisms
The MB91360G series contains a number of functions for controlling the operating clock to reduce power
consumption.
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Software control : Sleep and stop/real time clock functions
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Hardware control : Hardware standby function
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Gear (divider) function : The CPU and peripheral clock frequencies can be set independently.
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Contains a range of peripheral functions
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UART, U-timer
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Real Time Clock (with optional subclock operation and subclock calibration module)
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Stepper Motor Control
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Sound Generator
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Serial IO (SIO) , SIO-Prescaler
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Power Down Reset
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Alarm Comparator
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IO-Timer
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I
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C Interface
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10 Bit D/A Converter
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CAN Interface
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10-bit A/D converter
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16-bit reload timer
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16-bit PWM timer
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Watchdog timer
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Bit search module
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Interrupt controller
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External interrupt inputs
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I/O port function
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Interrupt levels
“16 maskable interrupt levels”
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Other
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Power supply voltage
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5 V power supply used, the internal regulator creates internal supply of 3.3 V
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Package : MB91FV360GA uses a PGA401 package, MB91F362GA is delivered in a QFP208 package, and
MB91F369GA in QFP160 package.
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FUJITSU [ FUJITSU COMPONENT LIMITED. ]
