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DK86064-2 参数 Datasheet PDF下载

DK86064-2图片预览
型号: DK86064-2
PDF下载: 下载PDF文件 查看货源
内容描述: 双14位1GSa / s的DAC的开发工具包 [Dual 14-bit 1GSa/s DAC Development Kit]
分类和应用:
文件页数/大小: 4 页 / 276 K
品牌: FUJITSU [ FUJITSU ]
 浏览型号DK86064-2的Datasheet PDF文件第1页浏览型号DK86064-2的Datasheet PDF文件第3页浏览型号DK86064-2的Datasheet PDF文件第4页  
January 2008 Version 2.1  
FME/MS/DAC80/FL_2/5084  
DK86064-2 Dual 14-bit 1GSa/s DAC Development Kit  
programming cable supplied. Even if high speed  
Essential Equipment  
digital pattern generating equipment is available,  
initial testing using the waveform memories  
serves as a useful setup check.  
Apart from the power supplies, the minimum  
equipment vital to conducting an evaluation of  
the MB86064 is a high quality RF clock and  
spectrum analyser. The phase & spurious  
performance of the clock should be such as to  
not limit the DAC performance (e.g. HP8664A).  
However, performance of even the best  
spectrum analysers available is inferior to that of  
the converter. To overcome this, filtering  
techniques and careful attention to analyser  
settings, e.g. RF Attenuation, is essential during  
the course of the evaluation.  
Pattern  
generators  
can be connected to  
the evaluation board  
using either the on-  
board 2-row 0.1" data  
headers, or via ribbon  
cables to the optional  
SMA adaptors. When  
using the 0.1" data  
headers it is assumed  
that a custom wiring  
harness  
will  
be  
required. This would  
be made according to  
the connector type  
and pinout of the  
generator’s  
output.  
The optional SMA  
adaptors provide a convenient conversion from  
SMA to the evaluation board’s 0.1" headers. This  
alleviates the simultaneous removal of 28 SMAs  
(14-bit differential LVDS) when required to be  
disconnected. One advantage of this is the ability  
to easily swap the data generator between DAC  
data ports if insufficient channels are available to  
drive both ports simultaneously.  
Rather than using general purpose test  
equipment, customers may wish to use the  
evaluation board to construct a platform more  
representative of their end application. This  
might, for example, involve an FPGA to  
implement a variety of pre-processing and/or  
waveform generation functions. At the simplest  
level, a setup similar to that described for the  
digital pattern generator could be used, where a  
custom wiring harness interfaces a standard or  
existing FPGA platform to the DAC evaluation  
board. Control of the DAC from the PC software  
can be maintained to minimise effort to get up  
and running.  
Driving the DAC  
As with any DAC evaluation an appropriate test  
vector stimulus is required. Unfortunately at data  
rates above 300MSa/s this requires digital  
pattern generation capabilities beyond most  
standard test equipment. The DK86064-2  
Development Kit has been designed to help  
overcome this difficulty in a number of ways.  
Initially, unmodulated or pseudo-modulated  
single and multi-tone/carrier tests can be  
conducted using waveforms downloaded to the  
on-chip memories.  
Test waveforms are easily loaded into the  
memories using the PC software and USB  
Page 2 of 4  
Production  
Copyright © 2004-2008 Fujitsu Microelectronics Europe GmbH  
Disclaimer: The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before  
ordering.The information and circuit diagrams in this document are presented “as is”, no license is granted by implication or otherwise.  
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