Document No.: FT_000138
VINCULUM-II EMBEDDED DUAL USB HOST CONTROLLER IC Datasheet
Version -
1.2
Clearance No.: FTDI#
143
5.1 I/O Peripherals Signal Names
Peripheral
Debugger
Signal Name
debug_if
uart_txd
uart_rts#
uart_dtr#
uart_tx_active
UART
uart_rxd
uart_cts#
uart_dsr#
uart_ri#
uart_dcd#
fifo_data
fifo_txe#
Outputs
1
1
1
1
1
0
0
0
0
0
8
1
Inputs
1
0
0
0
0
1
1
1
1
1
8
0
Description
debugger interface
Transmit asynchronous data output
Request to send control output
Data acknowledge (data terminal ready control) output
Enable transmit data for RS485 designs
Receive asynchronous data input
Clear to send control input
Data request (data set ready control) input
Ring indicator control input
Data carrier detect control input
FIFO data bus
When high, do not write data into the FIFO. When low,
data can be written into the FIFO by strobing WR high,
then low.
When high, do not read data from the FIFO. When low,
there is data available in the FIFO which can be read by
strobing RD# low, then high.
Writes the data byte on the D0...D7 pins into the
transmit FIFO buffer when WR goes from high to low.
Enables the current FIFO data byte on D0...D7 when
low. Fetches the next FIFO data byte (if available) from
the receive FIFO buffer when RD# goes from high to
low
FIFO output enable – synchronous FIFO only
FIFO clock out – synchronous FIFO only
General purpose I/O
SPI clock input – slave 0
SPI chip select input – slave 0
SPI master out serial in – slave 0
SPI master in slave out – slave 0
SPI clock input – slave 1
SPI chip select input – slave 1
Master out slave in – slave 1
Master in slave out – slave 1
SPI clock input – master
Master out slave in - master
Master in slave out - master
Active low slave select 0 from master to slave 0
Active low slave select 1 from master to slave 1
Pulse width modulation
fifo_rxf#
FIFO
fifo_wr#
1
0
0
1
fifo_rd#
fifo_oe#
fifo_clkout
GPIO
gpio
spi_s0_clk
SPI Slave
0
spi_s0_ss#
spi_s0_mosi
spi_s0_miso
spi_s1_clk
SPI Slave
1
spi_s1_ss#
spi_s1_mosi
spi_s1_miso
spi_m_clk
SPI
Master
spi_m_mosi
spi_m_miso
spi_m_ss_0#
spi_m_ss_1#
PWM
pwm
0
0
0
40
0
0
1
1
0
0
1
1
1
1
0
1
1
8
1
1
1
40
1
1
1
0
1
1
1
0
0
1
1
0
0
0
Table 8 I/O Peripherals Signal Names
Note: # is used to indicate an active low signal.
Copyright © 2010 Future Technology Devices International Limited
31
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