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VNC2-48Q1B-TRAY 参数 Datasheet PDF下载

VNC2-48Q1B-TRAY图片预览
型号: VNC2-48Q1B-TRAY
PDF下载: 下载PDF文件 查看货源
内容描述: [Vinculum-II Embedded Dual USB Host Controller IC]
分类和应用:
文件页数/大小: 88 页 / 2234 K
品牌: FTDI [ FUTURE TECHNOLOGY DEVICES INTERNATIONAL LTD. ]
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Datasheet  
Vinculum-II Embedded Dual USB Host Controller IC  
Version 1.7  
Document No.: FT_000138 Clearance No.: FTDI#143  
4.2.4 Input / Output Multiplexer Module  
VNC2 peripheral interfaces are UART, SPI slave0, SPI slave1, SPI master, FIFO-Asynchronous, FIFO-  
Synchronous, GPIO, debug interface and PWM.  
The I/O multiplexer allows the designer to select which peripherals are connectedto the device I/O pins.  
The selectable peripheral interfaces are only limited by the number of I/O pins available. All peripherals  
are available across the package range except synchronous FIFO mode which cannot be selected on 32  
pin packages. The available configurable I/O pins per package are as follows:  
32 pin package 12 I/O pins  
48 pin package 28 I/O pins  
64 pin package 44 I/O pins  
Table 4.1 lists the peripherals which can be multiplexed to I/O and the maximum number of pins  
required for each one. The designer can choose any mix of peripheral configurations as long as they are  
within the specific package I/O pin count. Depending on the design not all 9 UART pins need to be  
configured. Similarly the GIPO peripheral does not need all pins configured.  
e.g. The 48 pin package has 28 I/O pins which could be configured as UART 9 pins, SPI Master 5  
pins, FIFO Asynchronous 12 pins and GPIO 2 pins. This makes a total of 28 pins.  
Please refer to Section 5 for a detailed description of the I/O multiplexer.  
Peripherals  
UART  
Maximum pins required  
9
4
SPI Slave 0  
SPI Slave 1  
SPI Master  
FIFO Asynchronous  
FIFO Synchronous  
GPIO  
4
5
12  
14  
40  
1
Debug  
PWM  
8
Table 4.1 - Peripheral Pin Requirements  
22  
Copyright © Future Technology Devices International Limited  
 
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