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IOBUS4 参数 Datasheet PDF下载

IOBUS4图片预览
型号: IOBUS4
PDF下载: 下载PDF文件 查看货源
内容描述: [Vinculum-II Embedded Dual USB Host Controller IC]
分类和应用:
文件页数/大小: 88 页 / 2234 K
品牌: FTDI [ FUTURE TECHNOLOGY DEVICES INTERNATIONAL LTD. ]
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Datasheet  
Vinculum-II Embedded Dual USB Host Controller IC  
Version 1.7  
Document No.: FT_000138 Clearance No.: FTDI#143  
4.2.5 Peripheral DMA Modules 0, 1, 2 & 3  
The peripheral DMA has the capability to transfer data to and from an I/O device. The CPU can offload  
the transfer of data between the processor and the peripheral freeing the CPU to execute other  
instructions.  
The DMA module collects or transmits data from memory to an I/O address space; it is also capable of  
copying data in memory and transferring it to another location.  
The DMA is not accessible by the user as it automatically controlledby the CPU.  
4.2.6 RAM Module  
The RAM module consists of 16k bytes on-chip (4k x 32-bits) data memory. The RAM is byte addressable.  
4.2.7 Peripheral Interface Modules  
VNC2 has nine peripheral interface modules. Full descriptions of each module are described in section 6.  
Debugger Interface  
SPI Master  
UART  
PWM  
FIFO  
SPI Slave 0 & 1  
GPIO - General purpose I/O pins  
General purpose timers  
4.2.8 USB Transceivers 0 and 1  
Two USB transceiver cells provide the physical USB device interface supporting USB 1.1 and USB 2.0  
standards. Low-speed and full-speed USB data rates are supported. Each output driver provides +3.3V  
level slew rate control signalling, whilst a differential receiver and two single ended receivers provide USB  
DATA IN, SE0 and USB Reset condition detection. These cells also include integrated internal USB pull-up  
or pull-down resistors as required for host or slave mode.  
4.2.9 USB Host / Device Controllers  
These blocks handle the parallel-to-serial and serial-to-parallel conversion of the USB physical layer. This  
includes bit stuffing, CRC generation, USB frame generation and protocol error checking. The Host /  
Device controller is autonomous and therefore requires limited load fromthe CPU.  
4.2.10 12MHz Oscillator  
The 12MHz Oscillator cell generates a 12MHz reference clock input to the Clock Multiplier PLL from an  
external 12MHz crystal. The external crystal is connected across Pin 4 XTIN and Pin 5 XTOUT in the  
configuration shown in Figure 10.1.  
4.2.11 Power Saving Modes and Standby mode.  
VNC2 can be set to operate in three frequencies allowing the user to select a slower speed to reduce  
power consumption. Three operating frequencies available are 12MHz, 24MHz and normal operation of  
48MHz. These operating modes can be configured using the RTOS. Full details are available in the RTOS  
manual available fromthe FTDI website.  
When a particular peripheral is not used, it is powered downinternally thus saving power.  
Standby mode is available under firmware control, this mode puts the VNC2 in a state with no clocks  
running or system blocks powered. The device will wake up out of this mode by toggling any of the  
following signals: USB0/1 DP or DM, SPI slave 0 select (spi_s0_ss#), SPI slave 1select (spi_s1_ss#) or  
UART ring indicator (uart_ri#).  
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