1.3 FT8U100AX Block Diagram
FT*U!))AX INTERNAL BLOCK DIAGRAM
External
ROM Bus
RA0 - RA14
ADDR
RD0 - RD7
ROE#,RCE#
EMCU
MICROCONTROLLER
CORE
DATA
CTL
DATA SRAM
256 Bytes
USB
DOWNSTREAM
PORTS
DN1+,DN1- to
DN7+, DN7-
FTDI
SERIAL INTERFACE
ENGINE
( SIE )
USB HUB REPEATER
EOF LOCK AND
BABBLE ERROR
DETECT
USB
UPSTREAM
PORT
UP1+,UP1-
Internal Data
Bus
OSC
48MHz
XTOUT
XTIN
PWR1# - PWR7#
HUB PORT
POWER CONTROL
AND
OVERCURRENT
DETECT
ENDPOINT DATA
BUFFER
256 Bytes
OVL1# - OVL7#
SPTX,IRTX,CRTX
MCLK,KCLK
PS/2 KEYBOARD I/F
MDAT,KDAT
PS/2 MOUSE I/F
SERIAL PORT 1
SERIAL PORT 2
( IrDA SIR )
SERIAL PORT 3
( CIR )
SPRX,IRRX,CRTXL/H
P1D0 to P1D7,
P2D0 to P2D6,
P3D0 to P3D6,
P4D0 to P4D6,
P5D0 to P5D5
SCL, SDA
MASTER / SLAVE
2-WIRE
SERIAL BUS
PARALLEL
I/O PORTS
1-5
INT
NOTE : SOME OF THE PARALLEL PORT
IO PINS ARE MULTIPLEXED WITH
OTHER SIGNALS
( SEE PINOUT DIAGRAM FOR DETAILS )
FTIR
Ir REMOTE CONTROL
PORT
FTIR
Future Technology Devices Intl.
FT8U100AX Product Data Rev 0.90
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