Document No.: FT_000052
FT245R USB FIFO IC Datasheet Version 2.10
Clearance No.: FTDI# 39
Pin No.
Name
Type
Description
+1.8V to +5.25V supply to the FIFO Interface group pins (1...3, 5, 6, 9...14, 22,
23). In USB bus powered designs connect this pin to 3V3OUT pin to drive out at
+3.3V levels, or connect to VCC to drive out at 5V CMOS level. This pin can also
be supplied with an external +1.8V to +2.8V supply in order to drive outputs at
lower levels. It should be noted that in this case this supply should originate from
the same source as the supply to VCC. This means that in bus powered designs a
regulator which is supplied by the +5V on the USB bus should be used.
Device ground supply pins
+3.3V output from integrated LDO regulator. This pin should be decoupled to
ground using a 100nF capacitor. The main use of this pin is to provide the internal
+3.3V supply to the USB transceiver cell and the internal 1.5kΩ pull up resistor on
USBDP. Up to 50mA can be drawn from this pin to power external logic if
required. This pin can also be used to supply the VCCIO pin.
+3.3V to +5.25V supply to the device core. (see Note 1)
Device analogue ground supply for internal clock multiplier
4
VCCIO
PWR
7, 18,
21
GND
PWR
17
3V3OUT
Output
20
25
VCC
AGND
PWR
PWR
Table 3.2 Power and Ground Group
Pin No.
Name
Type
Description
8, 24
19
NC
RESET#
NC
Input
No internal connection
Active low reset pin. This can be used by an external device to reset the
FT245R. If not required can be left unconnected, or pulled up to VCC.
Puts the device into IC test mode. Must be tied to GND for normal
operation, otherwise the device will appear to fail.
Input 12MHz Oscillator Cell. Optional – Can be left unconnected for
normal operation. (see Note 2)
Output from 12MHZ Oscillator Cell. Optional – Can be left unconnected
for normal operation if internal Oscillator is used. (see Note 2)
26
TEST
Input
27
OSCI
Input
28
OSCO
Output
Table 3.3 Miscellaneous Signal Group
Pin No.
Name
Type
Description
FIFO Data Bus Bit 0
FIFO Data Bus Bit 4
FIFO Data Bus Bit 2
FIFO Data Bus Bit 1
FIFO Data Bus Bit 7
FIFO Data Bus Bit 5
FIFO Data Bus Bit 6
1
2
3
5
6
9
10
D0
D4
D2
D1
D7
D5
D6
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Copyright © 2010 Future Technology Devices International Limited
8
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