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FT245BL 参数 Datasheet PDF下载

FT245BL图片预览
型号: FT245BL
PDF下载: 下载PDF文件 查看货源
内容描述: USB FIFO ( USB - 并行) I.C. [USB FIFO ( USB - Parallel ) I.C.]
分类和应用: 外围集成电路先进先出芯片PC
文件页数/大小: 24 页 / 541 K
品牌: FTDI [ FUTURE TECHNOLOGY DEVICES INTERNATIONAL LTD. ]
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FT245BL USB FIFO ( USB - Parallel ) I.C.  
Serial Interface Engine (SIE)  
enumeration is required. RSTOUT# will be low for  
approximately 5ms after VCC has risen above 3.5V  
AND the device oscillator is running AND RESET#  
is high. RESET# should be tied to VCC unless it  
is a requirement to reset the device from external  
logic or an external reset generator I.C.  
The Serial Interface Engine (SIE) block performs  
the Parallel to Serial and Serial to Parallel  
conversion of the USB data. In accordance to the  
USB 2.0 specification, it performs bit stuffing / un-  
stuffing and CRC5 / CRC16 generation / checking  
on the USB data stream.  
EEPROM Interface  
USB Protocol Engine  
Though the FT245BL will work without the optional  
EEPROM, an external 93C46 (93C56 or 93C66)  
EEPROM can be used to customise the USB VID,  
PID, Serial Number, Product Description Strings  
and Power Descriptor value of the FT245BL for  
OEM applications. Other parameters controlled  
by the EEPROM include Remote Wake Up,  
Isochronous Transfer Mode, Soft Pull Down on  
Power-Off and USB 2.0 descriptor modes.  
The EEPROM should be a 16 bit wide  
The USB Protocol Engine manages the data  
stream from the device USB control endpoint. It  
handles the low level USB protocol (Chapter 9)  
requests generated by the USB host controller  
and the commands for controlling the functional  
parameters of the FIFO.  
FIFO Receive Buffer (128 bytes)  
Data sent from the USB Host to the FIFO via  
the USB data out endpoint is stored in the FIFO  
Receive Buffer and is removed from the buffer by  
reading the FIFO contents using RD#.  
configuration such as a MicroChip 93LC46B or  
equivalent capable of a 1Mb/s clock rate at VCC =  
4.35V to 5.25V. The EEPROM is programmable-  
on board over USB using a utility available from  
FTDI’s web site ( http://www.ftdichip.com ). This  
allows a blank part to be soldered onto the PCB  
and programmed as part of the manufacturing and  
test process.  
FIFO Transmit Buffer (384 bytes)  
Data written into the FIFO using WR# is stored in  
the FIFO Transmit Buffer. The Host removes Data  
from the FIFO Transmit Data by sending a USB  
request for data from the device data in endpoint.  
If no EEPROM is connected (or the EEPROM is  
blank), the FT245BL will use its built-in default VID,  
PID Product Description and Power Descriptor  
Value. In this case, the device will not have a serial  
number as part of the USB descriptor.  
FIFO Controller  
The FIFO Controller handles the transfer of data  
between the external FIFO interface pins and the  
FIFO Transmit and Receive buffers.  
RESET Generator  
The Reset Generator Cell provides a reliable  
power-on reset to the device internal circuitry  
on power up. An additional RESET# input and  
RSTOUT# output are provided to allow other  
devices to reset the FT245BL, or the FT245BL  
to reset other devices respectively. During reset,  
RSTOUT# is driven low, otherwise it drives out  
at the 3.3V provided by the onboard regulator.  
RSTOUT# can be used to control the 1.5K  
pull-up on USBDP directly where delayed USB  
DS245BL Version 1.7  
© Future Technology Devices Intl. Ltd. 2005  
Page 6 of 24  
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