FT245BL USB FIFO ( USB - Parallel ) I.C.
FT245BL TIMING DIAGRAM – FIFO READ CYCLE
T6
T5
RXF#
RD#
T1
T2
T3
T4
D0..D7
valid data
Time
T1
Description
Min
Max
Unit
ns
ns
ns
ns
ns
ns
RD Active Pulse Width
50
T2
RD to RD Pre-Charge Time
RD Active to Valid Data *** Note 4
Valid Data Hold Time from RD Inactive *** Note 4
RD Inactive to RXF#
50 + T6
T3
20
0
50
25
T4
T5
0
T6
RXF inactive after RD cycle
80
*** Note 4 - Load 30 pF
FT245BL TIMING DIAGRAM – FIFO WRITE CYCLE
T12
T11
TXE#
WR
T7
T8
T10
T9
D0..D7
valid data
Time
T7
Description
Min
50
50
20
0
Max
Unit
ns
ns
ns
ns
ns
ns
WR Active Pulse Width
T8
WR to WR Pre-Charge Time
Data Setup Time before WR inactive
Data Hold Time from WR inactive
WR Inactive to TXE#
T9
T10
T11
T12
5
25
TXE inactive after WR cycle
80
DS245BL Version 1.7
© Future Technology Devices Intl. Ltd. 2005
Page 11 of 24
FTDI [ FUTURE TECHNOLOGY DEVICES INTERNATIONAL LTD. ]
