Document No.: FT_000061
FT2232H DUAL HIGH SPEED USB TO MULTIPURPOSE UART/FIFO IC
Datasheet Version 2.09
Clearance No.: FTDI#77
3.2 FT2232H Pin Descriptions
This section describes the operation of the FT2232H pins. Both the LQFP and the QFN packages have the
same function on each pin. The function of many pins is determined by the configuration of the FT2232H.
The following table details the function of each pin dependent on the configuration of the interface. Each
of the functions are described in the following table (Note: The convention used throughout this
document for active low signals is the signal name followed by a #).
Pins marked ** default to tri-stated inputs with an internal 75KΩ (approx) pull up resistor to VCCIO.
FT2232H
Pin
Pin #
16
17
18
19
21
22
23
24
26
27
28
29
30
32
33
34
38
39
40
41
43
44
45
46
48
52
53
54
55
57
58
59
60
36
63
Pin Name
ADBUS0
ADBUS1
ADBUS2
ADBUS3
ADBUS4
ADBUS5
ADBUS6
ADBUS7
ACBUS0
ACBUS1
ACBUS2
ACBUS3
ACBUS4
ACBUS5
ACBUS6
ACBUS7
BDBUS0
BDBUS1
BDBUS2
BDBUS3
BDBUS4
BDBUS5
BDBUS6
BDBUS7
BCBUS0
BCBUS1
BCBUS2
BCBUS3
BCBUS4
BCBUS5
BCBUS6
BCBUS7
PWREN#
SUSPEND#
Pin functions (depends on configuration)
ASYNC
Serial
(RS232)
TXD
RXD
RTS#
CTS#
DTR#
DSR#
DCD#
RI#
TXDEN
**
**
RXLED#
TXLED#
**
**
**
TXD
RXD
RTS#
CTS#
DTR#
DSR#
DCD#
RI#
TXDEN
**
**
RXLED#
TXLED#
**
**
PWRSAV
#
PWREN#
SUSPEND#
245 FIFO
SYNC
D0
D1
D2
D3
D4
D5
D6
D7
RXF#
TXE#
RD#
WR#
SIWUA
CLKOUT
OE#
**
245 FIFO
D0
D1
D2
D3
D4
D5
D6
D7
RXF#
TXE#
RD#
WR#
SIWUA
**
**
**
D0
D1
D2
D3
D4
D5
D6
D7
RXF#
TXE#
RD#
WR#
SIWUB
**
**
ASYNC
Bit-bang
D0
D1
D2
D3
D4
D5
D6
D7
**
WRSTB#
RDSTB#
**
SIWUA
**
**
**
D0
D1
D2
D3
D4
D5
D6
D7
**
WRSTB#
RDSTB#
**
SIWUB
**
**
PWRSAV
#
SYNC
Bit-bang
Channel A
D0
D1
D2
D3
D4
D5
D6
D7
**
WRSTB#
RDSTB#
**
SIWUA
**
**
**
Channel B
D0
D1
D2
D3
D4
D5
D6
D7
**
WRSTB#
RDSTB#
**
SIWUB
**
**
PWRSAV
#
MPSSE
TCK/SK
TDI/DO
TDO/DI
TMS/CS
GPIOL0
GPIOL1
GPIOL2
GPIOL3
GPIOH0
GPIOH1
GPIOH2
GPIOH3
GPIOH4
GPIOH5
GPIOH6
GPIOH7
TCK/SK
TDI/DO
TDO/DI
TMS/CS
GPIOL0
GPIOL1
GPIOL2
GPIOL3
GPIOH0
GPIOH1
GPIOH2
GPIOH3
GPIOH4
GPIOH5
GPIOH6
GPIOH7
PWREN#
SUSPEND
#
Fast
Serial
interface
CPU
Style
FIFO
D0
Host Bus
Emulation
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
A8
A9
A10
A11
A12
A13
A14
A15
CS#
ALE
RD#
WR#
IORDY
CLKOUT
I/O0
I/O1
**
**
**
**
**
**
**
PWRSAV#
USES
CHANNEL
B
D1
D2
D3
D4
D5
D6
D7
CS#
A0
RD#
WR#
SIWUA
**
**
**
FSDI
FSCLK
FSDO
FSCTS
D0
D1
D2
D3
D4
D5
D6
D7
CS#
A0
RD#
WR#
SIWUB
SIWUB
**
**
PWRSAV
#
PWRSAV
#
PWRSAV
#
PWRSAV#
PWREN#
SUSPEND#
PWREN#
SUSPEND
#
PWREN#
SUSPEND
#
PWREN#
SUSPEND
#
PWREN#
SUSPEND
#
PWREN#
SUSPEND
#
PWREN#
SUSPEND
#
Configuration memory interface
EECS
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