Document No.: FT_000589
FT313H USB2.0 HS Host Controller Datasheet Version 1.1
Clearance No.: FTDI# 318
6.4.2 DMA timing
DMA timing characteristics (Ambient Temperature = -40°C to +85°C)
Parameter
Tsudreqdack
Tddackdreq
Thdreqdack
Description
Min
Max
Unit
DREQ Set-up Time before DACK
Assertion
-
0
ns
ns
DACK De-assertion to Next DREQ
Assertion Time
18
-
DREQ Hold Time after Last Strobe
Assertion
-
35
ns
Trwp
Toe
RD_N/WR_N Pulse Width
40
8
-
-
ns
ns
ns
Data Valid Time after RD_N Assertion
Read Data Hold Time after RD_N De-
asserts
4
9
Trdh
Write Data Hold Time after WR_N De-
assertion
0
6
-
-
-
-
-
ns
ns
ns
ns
ns
Twdh
Write Data Set-up Time before WR_N
De-assertion
Tdadvh
DACK Set-up Time before
RD_N/WR_N Assertion
0
Tsudackrw
DACK De-assertion after RD_N/WR_N
De-assertion
0
Trwdack
Tcyc
DMA Read/Write Cycle Time
80
Table 6-13 DMA timing
DREQ
Tsudreqdack
Thdreqdack
Trwp
Tcyc
DACK
Tsudackrw
Tddackdreq
RD_N/
WR_N
Trwdack
Toe
Trdh
DATA[15:0]
(read)
Tdadvh
Twdh
DATA[15:0]
(write)
DATA1
DATA2
DATAn
Figure 6-7 DMA read and write
Copyright © 2012 Future Technology Devices International Limited
52
FTDI [ FUTURE TECHNOLOGY DEVICES INTERNATIONAL LTD. ]
