DDR and DDR2 SDRAM
Table 13 provides the recommended operating conditions for the DDR SDRAM controller when
GV (typ) = 2.5 V.
DD
Table 13. DDR SDRAM DC Electrical Characteristics for GV (typ) = 2.5 V
DD
Parameter/Condition
I/O supply voltage
Symbol
Min
Max
Unit
Notes
GV
MV
2.375
2.625
V
V
1
2
DD
I/O reference voltage
I/O termination voltage
Input high voltage
0.49 × GV
0.51 × GV
DD
REF
TT
DD
V
MV
– 0.04
+ 0.15
MV
+ 0.04
REF
V
3
REF
REF
V
MV
GV + 0.3
V
—
—
4
IH
DD
Input low voltage
V
I
–0.3
MV
– 0.15
REF
V
IL
Output leakage current
–50
–16.2
16.2
50
μA
mA
mA
OZ
OH
Output high current (V
= 1.95 V)
I
—
—
—
—
OUT
Output low current (V
= 0.35 V)
I
OL
OUT
Notes:
1. GV is expected to be within 50 mV of the DRAM V at all times.
DD
DD
2. MV
is expected to be equal to 0.5 × GV , and to track GV DC variations as measured at the receiver. Peak-to-peak
REF
DD DD
may not exceed ±2% of the DC value.
noise on MV
REF
3. V is not applied directly to the device. It is the supply to which far end signal termination is made and is expected to be
TT
equal to MV
. This rail should track variations in the DC level of MV
.
REF
REF
4. Output leakage is measured with all outputs disabled, 0 V ≤ VOUT ≤ GV
.
DD
Table 14 provides the DDR I/O capacitance when GV (typ) = 2.5 V.
DD
Table 14. DDR SDRAM Capacitance for GV (typ) = 2.5 V
DD
Parameter/Condition
Input/output capacitance: DQ, DQS
Symbol
Min
Max
Unit
Notes
C
6
8
pF
pF
1
1
IO
Delta input/output capacitance: DQ, DQS
C
—
0.5
DIO
Note:
1. This parameter is sampled. GV = 2.5 V ± 0.125 V, f = 1 MHz, T = 25°C, V
= GV /2, V
(peak-to-peak) = 0.2 V.
DD
A
OUT
DD
OUT
Table 15 provides the current draw characteristics for MV
.
REF
Table 15. Current Draw Characteristics for MV
REF
Parameter/Condition
Current draw for MV
Symbol
Min
Max
Unit
Notes
I
—
500
μA
1
REF
MVREF
Note:
1. The voltage regulator for MV
must be able to supply up to 500 μA current.
REF
MPC8548E PowerQUICC™ III Integrated Processor Hardware Specifications, Rev. 6
Freescale Semiconductor
20
FREESCALE [ Freescale ]
