Package Description
Table 70. MPC8543E Pinout Listing (continued)
Power
Supply
Signal
Package Pin Number
Pin Type
Notes
IRQ[0:7]
AG23, AF18, AE18, AF20, AG18, AF17, AH24,
AE20
I
OV
—
DD
IRQ[8]
AF19
I
OV
OV
OV
OV
OV
—
1
DD
DD
DD
DD
DD
IRQ[9]/DMA_DREQ3
IRQ[10]/DMA_DACK3
IRQ[11]/DMA_DDONE3
IRQ_OUT
AF21
I
AE19
I/O
I/O
O
1
AD20
1
AD18
2, 4
Ethernet Management Interface
EC_MDC
EC_MDIO
AB9
O
OV
OV
5, 9
—
DD
DD
AC8
I/O
Gigabit Reference Clock
V11
EC_GTX_CLK125
I
LV
—
DD
Three-Speed Ethernet Controller (Gigabit Ethernet 1)
TSEC1_RXD[7:0]
TSEC1_TXD[7:0]
TSEC1_COL
TSEC1_CRS
TSEC1_GTX_CLK
TSEC1_RX_CLK
TSEC1_RX_DV
TSEC1_RX_ER
TSEC1_TX_CLK
TSEC1_TX_EN
TSEC1_TX_ER
GPIN[0:7]
R5, U1, R3, U2, V3, V1, T3, T2
I
LV
LV
LV
LV
LV
LV
LV
LV
LV
LV
LV
LV
LV
LV
LV
—
5, 9
—
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
T10, V7, U10, U5, U4, V6, T5, T8
O
I
R4
V5
I/O
O
I
20
U7
—
U3
—
V2
I
—
T1
I
—
T6
I
—
U9
O
O
I
30
T7
—
P2, R2, N1, N2, P3, M2, M1, N3
103
—
GPOUT[0:5]
N9, N10, P8, N7, R9, N5
O
O
O
—
—
—
—
I
cfg_dram_type0/GPOUT6
GPOUT7
R8
N6
P1
R6
P6
N4
P5
R1
5, 9
—
Reserved
—
104
104
15
Reserved
—
—
—
Reserved
Reserved
105
104
104
FIFO1_RXC2
Reserved
LV
DD
—
—
MPC8548E PowerQUICC™ III Integrated Processor Hardware Specifications, Rev. 6
Freescale Semiconductor
118
FREESCALE [ Freescale ]
