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MPC8572ELVTAULD 参数 Datasheet PDF下载

MPC8572ELVTAULD图片预览
型号: MPC8572ELVTAULD
PDF下载: 下载PDF文件 查看货源
内容描述: MPC8572E的PowerQUICC III集成处理器硬件规格 [MPC8572E PowerQUICC III Integrated Processor Hardware Specifications]
分类和应用: PC
文件页数/大小: 140 页 / 1412 K
品牌: FREESCALE [ Freescale ]
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PCI Express  
Figure 55. Minimum Transmitter Timing and Voltage Output Compliance Specifications  
16.4.3 Differential Receiver (RX) Input Specifications  
Table 62 defines the specifications for the differential input at all receivers (RXs). The parameters are  
specified at the component pins.  
Table 62. Differential Receiver (RX) Input Specifications  
Symbol  
Parameter  
Min Nominal  
Max  
Units  
Comments  
UI  
Unit Interval  
399.88  
400  
400.12  
ps  
Each UI is 400 ps ± 300 ppm. UI does not  
account for Spread Spectrum Clock  
dictated variations. See Note 1.  
V
Differential Input 0.175  
Peak-to-Peak  
Voltage  
1.200  
V
V
= 2*|V  
- V  
|
RX-D-  
RX-DIFFp-p  
RX-DIFFp-p  
RX-D+  
See Note 2.  
T
Minimum  
Receiver Eye  
Width  
0.4  
UI  
The maximum interconnect media and  
Transmitter jitter that can be tolerated by the  
Receiver can be derived as T  
RX-EYE  
RX-MAX-JITTER  
= 1 - T  
= 0.6 UI.  
RX-EYE  
See Notes 2 and 3.  
MPC8572E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 4  
Freescale Semiconductor  
86  
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