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MPC8347ECVVAGDB 参数 Datasheet PDF下载

MPC8347ECVVAGDB图片预览
型号: MPC8347ECVVAGDB
PDF下载: 下载PDF文件 查看货源
内容描述: MPC8347EA的PowerQUICC II Pro整合型主机处理器的硬件规格 [MPC8347EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications]
分类和应用: 外围集成电路PC时钟
文件页数/大小: 99 页 / 727 K
品牌: FREESCALE [ Freescale ]
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USB  
9 USB  
This section provides the AC and DC electrical specifications for the USB interface of the MPC8347EA.  
9.1  
USB DC Electrical Characteristics  
Table 35 provides the DC electrical characteristics for the USB interface.  
Table 35. USB DC Electrical Characteristics  
Parameter  
Symbol  
Min  
Max  
Unit  
High-level input voltage  
Low-level input voltage  
Input current  
VIH  
VIL  
2
–0.3  
OVDD + 0.3  
V
V
0.8  
5
IIN  
μA  
V
High-level output voltage, IOH = –100 μA  
Low-level output voltage, IOL = 100 μA  
VOH  
VOL  
OVDD – 0.2  
0.2  
V
9.2  
USB AC Electrical Specifications  
Table 36 describes the general timing parameters of the USB interface of the MPC8347EA.  
Table 36. USB General Timing Parameters (ULPI Mode Only)  
Parameter  
Symbol1  
Min  
Max  
Unit  
Notes  
USB clock cycle time  
tUSCK  
tUSIVKH  
tUSIXKH  
tUSKHOV  
tUSKHOX  
15  
4
7
ns  
ns  
ns  
ns  
ns  
2–5  
2–5  
2–5  
2–5  
2–5  
Input setup to USB clock—all inputs  
Input hold to USB clock—all inputs  
USB clock to output valid—all outputs  
Output hold from USB clock—all outputs  
Notes:  
1
2
1. The symbols for timing specifications follow the pattern of t(first two letters of functional block)(signal)(state)(reference)(state) for inputs  
and t(first two letters of functional block)(reference)(state)(signal)(state) for outputs. For example, tUSIXKH symbolizes USB timing (US) for  
the input (I) to go invalid (X) with respect to the time the USB clock reference (K) goes high (H). Also, tUSKHOX symbolizes  
USB timing (US) for the USB clock reference (K) to go high (H), with respect to the output (O) going invalid (X) or output hold  
time.  
2. All timings are in reference to USB clock.  
3. All signals are measured from OVDD/2 of the rising edge of the USB clock to 0.4 × OVDD of the signal in question for 3.3 V  
signaling levels.  
4. Input timings are measured at the pin.  
5. For active/float timing measurements, the Hi-Z or off-state is defined to be when the total current delivered through the  
component pin is less than or equal to that of the leakage current specification.  
MPC8347EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 12  
Freescale Semiconductor  
35