Pinout
Table 38. Module signals by GPIO port and pin (continued)
64-pin
5
48-pin
44-pin
32-pin
Port
PTD0
PTA3
PTE5
PTF4
PTD1
PTA2
PTE4
PTC2
Module signal(s)
SPI1_SCLK
SPI1_SCLK
SPI1_SCLK
SPI1_SCLK
SPI1_SS
1
6
10
42
58
6
4
38
3
4
30
42
2
9
5
3
SPI1_SS
41
57
29
41
SPI1_SS
37
29
SPI1_SS
UART0
5
1
PTD0
PTD7
PTE5
PTC3
PTD1
PTE0
PTE4
PTF7
PTC7
PTD6
PTE6
PTC4
PTC6
PTA7
PTE7
PTC5
UART0_CTS_b
UART0_CTS_b
UART0_CTS_b
UART0_CTS_b
UART0_RTS_b
UART0_RTS_b
UART0_RTS_b
UART0_RTS_b
UART0_RX
32
42
62
6
30
46
2
42
30
33
41
61
4
29
45
41
22
43
31
43
63
3
24
47
UART0_RX
UART0_RX
31
16
32
5
UART0_RX
UART0_TX
30
44
64
23
31
48
21
27
44
UART0_TX
UART0_TX
UART0_TX
UART1
11
58
12
57
10
59
9
7
42
8
5
38
6
PTA4
PTF4
PTA5
PTC2
PTA3
PTF5
PTA2
PTF6
UART1_CTS_b
UART1_CTS_b
UART1_RTS_b
UART1_RTS_b
UART1_RX
6
29
4
41
6
37
4
43
5
39
3
UART1_RX
3
UART1_TX
60
44
40
UART1_TX
MCF51JU128 Data Sheet, Rev. 4, 01/2012.
Freescale Semiconductor, Inc.
71