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MC9S12P64CFT 参数 Datasheet PDF下载

MC9S12P64CFT图片预览
型号: MC9S12P64CFT
PDF下载: 下载PDF文件 查看货源
内容描述: 微控制器 [Microcontrollers]
分类和应用: 微控制器外围集成电路时钟
文件页数/大小: 566 页 / 7414 K
品牌: FREESCALE [ Freescale ]
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Pulse-Width Modulator (PWM8B6CV1) Block Description  
10.2.4 PWM2 — Pulse Width Modulator Channel 2 Pin  
This pin serves as waveform output of PWM channel 2.  
10.2.5 PWM1 — Pulse Width Modulator Channel 1 Pin  
This pin serves as waveform output of PWM channel 1.  
10.2.6 PWM0 — Pulse Width Modulator Channel 0 Pin  
This pin serves as waveform output of PWM channel 0.  
10.3 Memory Map and Register Definition  
This subsection describes in detail all the registers and register bits in the PWM8B6CV1 module.  
The special-purpose registers and register bit functions that would not normally be made available to  
device end users, such as factory test control registers and reserved registers are clearly identified by means  
of shading the appropriate portions of address maps and register diagrams. Notes explaining the reasons  
for restricting access to the registers and functions are also explained in the individual register descriptions.  
10.3.1 Module Memory Map  
The following paragraphs describe the content of the registers in the PWM8B6CV1 module. The base  
address of the PWM8B6CV1 module is determined at the MCU level when the MCU is defined. The  
register decode map is fixed and begins at the first address of the module address offset. Table 10-1 shows  
the registers associated with the PWM and their relative offset from the base address. The register detail  
description follows the order in which they appear in the register map.  
Reserved bits within a register will always read as 0 and the write will be unimplemented. Unimplemented  
functions are indicated by shading the bit.  
Table 10-1 shows the memory map for the PWM8B6CV1 module.  
NOTE  
Register address = base address + address offset, where the base address is  
defined at the MCU level and the address offset is defined at the module  
level.  
Table 10-1. PWM8B6CV1 Memory Map  
Address  
Offset  
Register  
Access  
0x0000  
0x0001  
0x0002  
0x0003  
0x0004  
PWM Enable Register (PWME)  
R/W  
R/W  
R/W  
R/W  
R/W  
PWM Polarity Register (PWMPOL)  
PWM Clock Select Register (PWMCLK)  
PWM Prescale Clock Select Register (PWMPRCLK)  
PWM Center Align Enable Register (PWMCAE)  
S12P-Family Reference Manual, Rev. 1.13  
Freescale Semiconductor  
331  
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