To provide the most up-to-date information, the revision of our documents on the World Wide Web will be
the most current. Your printed copy may be an earlier revision. To verify you have the latest information
available, refer to:
http://freescale.com/
A full list of family members and options is included in the appendices.
The following revision history table summarizes changes contained in this document.
This document contains information for all constituent modules, with the exception of the CPU. For CPU
information please refer to CPU12-1 in the CPU12 & CPU12X Reference Manual.
Revision History
Revision
Level
Date
Description
April 2008
July 2008
1.07
PRELIMINARY
Minor Corrections
Added typ. IDD values
1.08
Completed Electricals
Minor Corrections
December 2008
March 2009
1.09
1.10
Final Electricals
Corrected section 1.11.3.4 Memory
Corrected 1.7.3.16 - 1.7.3.19 SPI pin description
Removed reference to MMCCTL1 register from Table 13-5
Removed item 4b from Table A-6 and A-7
June 2009
1.11
Changed Version ID in Table 1-5 from $FF to $00
Added Register Summary Appendix D
October 2009
April 2010
1.12
1.13
Updated FTMRC Blockguide . See Revision History Chapter 13
Updated CPMU Blockguide . See Revision History Chapter 7
Updated S12PMMCV1 Blockguide. See Revision History Chapter 3
Updated S12CPMU Blockguide. See Revision History Chapter 7