General Description
PIN NAME
Table 1-2. Pin Functions
VOLTAGE
LEVEL
PIN DESCRIPTION
IN/OUT
8-bit general purpose I/O port; PTB0–PTB3 are open drain when
configured as output. PTB4–PTB7 have schmitt trigger inputs.
VDD
In/Out
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
PTB0 as SDA of MMIIC.
PTB1 as SCL of MMIIC.
PTB2 as TxD of SCI; open drain output.
PTB3 as RxD of SCI.
In/Out
In/Out
Out
PTB0/SDA
PTB1/SCL
PTB2/TxD
PTB3/RxD
In
PTB4/T1CH0
PTB5/T1CH1
PTB6/T2CH0
PTB7/T2CH1
PTB4 as T1CH0 of TIM1.
PTB5 as T1CH1 of TIM1.
PTB6 as T2CH0 of TIM2.
PTB7 as T2CH1 of TIM2.
In/Out
In/Out
In/Out
In/Out
8-bit general purpose I/O port; PTC6 and PTC7 are open drain
when configured as output.
VDD
In/Out
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
PTC0 is shared with IRQ2 and has schmitt trigger input.
PTC2 as MISO of SPI.
In
In
PTC0/IRQ2
PTC1
PTC2/MISO
PTC3/MOSI
PTC4/SS
PTC5/SPSCK
PTC6/SCTxD
PTC7/SCRxD
PTC3 as MOSI of SPI.
Out
In
PTC4 as SS of SPI.
PTC5 as SPSCK of SPI.
In/Out
Out
In
PTC6 as SCTxD of IRSCI; open drain output.
PTC7 as SCRxD of IRSCI.
PTD0/KBI0
:
PTD7/KBI7
8-bit general purpose I/O port with schmitt trigger inputs.
Pins as keyboard interrupts (with pullup), KBI0–KBI7.
In/Out
In
1. See Chapter 22 Electrical Specifications for VREG tolerance.
1.6 Power Supply Bypassing (VDD, VDDA, VSS, VSSA)
V
and V are the power supply and ground pins, the MCU operates from a single power supply
SS
DD
together with an on chip voltage regulator.
Fast signal transitions on MCU pins place high. short-duration current demands on the power supply. To
prevent noise problems, take special care to provide power supply bypassing at the MCU as Figure 1-5
shows. Place the bypass capacitors as close to the MCU power pins as possible. Use
high-frequency-response ceramic capacitor for C
, C
are optional bulk current bypass
BYPASS
BULK
capacitors for use in applications that require the port pins to source high current level.
MC68HC908AP Family Data Sheet, Rev. 4
26
Freescale Semiconductor
FREESCALE [ Freescale ]
