Security
SP
HIGH BYTE OF INDEX REGISTER
CONDITION CODE REGISTER
ACCUMULATOR
SP + 1
SP + 2
SP + 3
SP + 4
LOW BYTE OF INDEX REGISTER
HIGH BYTE OF PROGRAM COUNTER SP + 5
LOW BYTE OF PROGRAM COUNTER SP + 6
SP + 7
Figure 8-7. Stack Pointer at Monitor Mode Entry
8.4 Security
A security feature discourages unauthorized reading of FLASH locations while in monitor mode. The host
can bypass the security feature at monitor mode entry by sending eight security bytes that match the
bytes at locations $FFF6–$FFFD. Locations $FFF6–$FFFD contain user-defined data.
NOTE
Do not leave locations $FFF6–$FFFD blank. For security reasons, program
locations $FFF6–$FFFD even if they are not used for vectors.
During monitor mode entry, the MCU waits after the power-on reset for the host to send the eight security
bytes on pin PTA0. If the received bytes match those at locations $FFF6–$FFFD, the host bypasses the
security feature and can read all FLASH locations and execute code from FLASH. Security remains
bypassed until a power-on reset occurs. If the reset was not a power-on reset, security remains bypassed
and security code entry is not required. (See Figure 8-8.)
V
DD
4096 + 32 ICLK CYCLES
RST
256 BUS CYCLES (MINIMUM)
FROM HOST
FROM MCU
PTA0
1
1
4
1
4
2
1
NOTES:
1 = Echo delay, 2 bit times.
2 = Data return delay, 2 bit times.
4 = Wait 1 bit time before sending next byte.
Figure 8-8. Monitor Mode Entry Timing
MC68HC908AP Family Data Sheet, Rev. 4
Freescale Semiconductor
125
FREESCALE [ Freescale ]
