Freescale Semiconductor, Inc.
FLASH-1 Memory
FLASH Block Protection
By programming the block protect bits, a portion of the memory will be
locked so that no further erase or program operations may be
performed. Programming more than one bit at a time is redundant. If
both bit 1 and bit 2 are set, for instance, the address range
$9000–$FFFF is locked. If all bits are erased, then all of the memory is
available for erase and program. The presence of a voltage VHI on the
IRQ pin will bypass the block protection so that all of the memory,
including the block protect register, is open for program and erase
operations.
4.8.2 FLASH-2 Block Protect Register
NOTE: This block protect register controls the FLASH-2 array block protection.
However, since it is physically located in the FLASH-1 array, the
FLASH-1 control register must be used to program/erase this register.
The block protect register (FLBPR2) is implemented as a byte within the
FLASH-1 memory. Each bit, when programmed, protects a range of
addresses in the FLASH-2 array.
Address: $FF81
Bit 7
0
6
0
5
0
4
0
3
BPR3
0
2
BPR2
0
1
BPR1
0
Bit 0
BPR0
0
Read:
Write:
Reset:
0
0
0
0
= Unimplemented
Figure 4-4. FLASH-2 Block Protect Register (FLBPR2)
BPR3 — Block Protect Register Bit 3
This bit protects the FLASH memory contents in the address range
$4000–$7FFF.
1 = Address range protected from erase or program
0 = Address range open to erase or program
MC68HC908AS60 — Rev. 1.0
Technical Data
FLASH-1 Memory
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