Freescale Semiconductor, Inc.
FLASH-1 Memory
4.8.1 FLASH-1 Block Protect Register
The block protect register (FLBPR1) is implemented as a byte within the
FLASH-1 memory. Each bit, when programmed, protects a range of
addresses in the FLASH-1 array.
Address: $FF80
Bit 7
0
6
0
5
0
4
0
3
BPR3
0
2
BPR2
0
1
BPR1
0
Bit 0
BPR0
0
Read:
Write:
Reset:
0
0
0
0
= Unimplemented
Figure 4-3. FLASH-1 Block Protect Register (FLBPR1)
BPR3 — Block Protect Register Bit 3
This bit protects the FLASH memory contents in the address range
$C000–$FFFF.
1 = Address range protected from erase or program
0 = Address range open to erase or program
BPR2 — Block Protect Register Bit 2
This bit protects the FLASH memory contents in the address range
$A000–$FFFF.
1 = Address range protected from erase or program
0 = Address range open to erase or program
BPR1 — Block Protect Register Bit 1
This bit protects the FLASH memory contents in the address range
$9000–$FFFF.
1 = Address range protected from erase or program
0 = Address range open to erase or program
BPR0 — Block Protect Register Bit 0
This bit protects the FLASH memory contents in the address range
$8000–$FFFF.
1 = Address range protected from erase or program
0 = Address range open to erase or program
Technical Data
MC68HC908AS60 — Rev. 1.0
FLASH-1 Memory
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