MCU Block Diagram
INTERNAL BUS
‡
M68HC08 CPU
PTA7/ADC7
‡
PTA6/ADC6
CPU
REGISTERS
ARITHMETIC/LOGIC
UNIT (ALU)
‡
10-BIT ANALOG-TO-DIGITAL
CONVERTER MODULE
PTA5/ADC5
‡
PTA4/ADC4
‡
PTA3/ADC3
‡
CONTROL AND STATUS REGISTERS — 96 BYTES
USER FLASH — (SEE TABLE)
PTA2/ADC2
TIMEBASE
MODULE
‡
PTA1/ADC1
‡
PTA0/ADC0
2-CHANNEL TIMER INTERFACE
MODULE 1
USER RAM — (SEE TABLE)
PTB7/T2CH1
PTB6/T2CH0
PTB5/T1CH1
PTB4/T1CH0
MONITOR ROM — 959 BYTES
2-CHANNEL TIMER INTERFACE
MODULE 2
†
PTB3/RxD
USER FLASH VECTOR SPACE — 48 BYTES
†
PTB2/TxD
†
PTB1/SCL
OSCILLATORS AND
CLOCK GENERATOR MODULE
SERIAL COMMUNICATIONS
INTERFACE MODULE 1
†
PTB0/SDA
INTERNAL OSCILLATOR
†
PTC7/SCRxD
†
MULTI-MASTER IIC (SMBUS)
INTERFACE MODULE
RC OSCILLATOR
OSC1
PTC6/SCTxD
PTC5/SPSCK
PTC4/SS
X-TAL OSCILLATOR
OSC2
PTC3/MOSI
PTC2/MISO
PHASE-LOCKED LOOP
CGMXFC
SERIAL COMMUNICATIONS
INTERFACE MODULE 2
(WITH INFRARED
#
PTC1
#
PTC0/IRQ2 **
SYSTEM INTEGRATION
MODULE
MODULATOR/DEMODULATOR)
* RST
PTD7/KBI7 ***
PTD6/KBI6 ***
PTD5/KBI5 ***
PTD4/KBI4 ***
PTD3/KBI3 ***
PTD2/KBI2 ***
PTD1/KBI1 ***
PTD0/KBI0 ***
SERIAL PERIPHERAL
INTERFACE MODULE
* IRQ1
EXTERNAL INTERRUPT
MODULE
** IRQ2
KEYBOARD INTERRUPT
MODULE
COMPUTER OPERATING
PROPERLY MODULE
POWER-ON RESET
MODULE
LOW-VOLTAGE INHIBIT
MODULE
VDD
VDDA
VSS
* Pin contains integrated pullup device.
** Pin contains configurable pullup device.
POWER
*** Pin contains integrated pullup device when configured as KBI.
VSSA
†
Pin is open-drain when configured as output.
VREG
‡
LED direct sink pin.
Pin not bonded on 42-pin SDIP.
#
VREFH
VREFL
ADC REFERENCE
.
USER RAM
(bytes)
USER FLASH
DEVICE
(bytes)
62,368
32,768
16,384
8,192
MC68HC908AP64
MC68HC908AP32
MC68HC908AP16
MC68HC908AP8
2,048
2,048
1,024
1,024
Figure 1-1. MC68HC908AP64 Block Diagram
MC68HC908AP Family Data Sheet, Rev. 4
Freescale Semiconductor
21